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Searched refs:ZeroVec (Results 1 – 15 of 15) sorted by relevance

/external/mesa3d/src/mesa/program/
Dprog_execute.c73 static const GLfloat ZeroVec[4] = { 0.0F, 0.0F, 0.0F, 0.0F }; variable
91 return ZeroVec; in get_src_register_pointer()
98 return ZeroVec; in get_src_register_pointer()
104 return ZeroVec; in get_src_register_pointer()
109 return ZeroVec; in get_src_register_pointer()
115 return ZeroVec; in get_src_register_pointer()
124 return ZeroVec; in get_src_register_pointer()
137 return ZeroVec; in get_src_register_pointer()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_exec.c1004 static const union tgsi_exec_channel ZeroVec = variable
1622 &ZeroVec, in get_index_registers()
1681 &ZeroVec, in get_index_registers()
1807 &ZeroVec, in store_dest_dstret()
1856 &ZeroVec, in store_dest_dstret()
2164 inst->TexOffsets[0].SwizzleX, &index, &ZeroVec, &offset[0]); in fetch_texel_offsets()
2166 inst->TexOffsets[0].SwizzleY, &index, &ZeroVec, &offset[1]); in fetch_texel_offsets()
2168 inst->TexOffsets[0].SwizzleZ, &index, &ZeroVec, &offset[2]); in fetch_texel_offsets()
2223 &ZeroVec, in fetch_sampler_unit()
2290 args[last] = &ZeroVec; in exec_tex()
[all …]
/external/mesa3d/docs/relnotes/
D9.1.5.rst57 - mesa: Return ZeroVec/dummyReg instead of NULL pointer
/external/llvm-project/llvm/lib/Target/X86/
DX86InstCombineIntrinsic.cpp59 Constant *ZeroVec = Constant::getNullValue(II.getType()); in simplifyX86MaskedLoad() local
63 return IC.replaceInstUsesWith(II, ZeroVec); in simplifyX86MaskedLoad()
76 IC.Builder.CreateMaskedLoad(PtrCast, Align(1), BoolMask, ZeroVec); in simplifyX86MaskedLoad()
DX86ISelLowering.cpp20600 SDValue ZeroVec = DAG.getConstant(0, dl, InVT); in LowerAVXExtend() local
20603 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend()
/external/llvm/lib/Transforms/InstCombine/
DInstCombineCalls.cpp1113 Constant *ZeroVec = Constant::getNullValue(II.getType()); in simplifyX86MaskedLoad() local
1118 return IC.replaceInstUsesWith(II, ZeroVec); in simplifyX86MaskedLoad()
1139 IC.Builder->CreateMaskedLoad(PtrCast, 1, BoolMask, ZeroVec); in simplifyX86MaskedLoad()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineCalls.cpp1307 Constant *ZeroVec = Constant::getNullValue(II.getType()); in simplifyX86MaskedLoad() local
1312 return IC.replaceInstUsesWith(II, ZeroVec); in simplifyX86MaskedLoad()
1333 IC.Builder.CreateMaskedLoad(PtrCast, 1, BoolMask, ZeroVec); in simplifyX86MaskedLoad()
/external/llvm-project/clang/lib/CodeGen/
DCGExprScalar.cpp4421 llvm::Value *ZeroVec = llvm::Constant::getNullValue(VecTy); in VisitAbstractConditionalOperator() local
4423 CondV = Builder.CreateICmpNE(CondV, ZeroVec, "vector_cond"); in VisitAbstractConditionalOperator()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp6666 SDValue ZeroVec = getZeroVector(VT, Subtarget, DAG, dl); in LowerBUILD_VECTOR() local
6667 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, ZeroVec, in LowerBUILD_VECTOR()
6690 SDValue ZeroVec = getZeroVector(ShufVT, Subtarget, DAG, dl); in LowerBUILD_VECTOR() local
6691 Item = insert128BitVector(ZeroVec, Item, 0, DAG, dl); in LowerBUILD_VECTOR()
6982 SDValue ZeroVec = getZeroVector(ResVT, Subtarget, DAG, dl); in LowerCONCAT_VECTORSvXi1() local
6984 return ZeroVec; in LowerCONCAT_VECTORSvXi1()
6990 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, ZeroVec, V1, ZeroIdx); in LowerCONCAT_VECTORSvXi1()
6997 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, ZeroVec, V2, IdxVal); in LowerCONCAT_VECTORSvXi1()
14008 SDValue ZeroVec = getZeroVector(InVT, Subtarget, DAG, dl); in LowerAVXExtend() local
14011 SDValue OpLo = getUnpackl(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend()
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/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp5273 SDValue ZeroVec = in lowerZERO_EXTEND_VECTOR_INREG() local
5285 SDValue Shuf = DAG.getVectorShuffle(InVT, DL, PackedOp, ZeroVec, Mask); in lowerZERO_EXTEND_VECTOR_INREG()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp9151 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD() local
9154 VT, dl, N->getChain(), N->getBasePtr(), N->getOffset(), Mask, ZeroVec, in LowerMLOAD()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp17613 SDValue ZeroVec = DAG.getConstant(0, DL, VecVT); in reduceBuildVecToShuffleWithZero() local
17616 ZeroVec, ShufMask, DAG); in reduceBuildVecToShuffleWithZero()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp9507 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD() local
9510 VT, dl, N->getChain(), N->getBasePtr(), N->getOffset(), Mask, ZeroVec, in LowerMLOAD()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp18877 SDValue ZeroVec = DAG.getConstant(0, DL, VecVT); in reduceBuildVecToShuffleWithZero() local
18880 ZeroVec, ShufMask, DAG); in reduceBuildVecToShuffleWithZero()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp19627 SDValue ZeroVec = DAG.getConstant(0, dl, InVT); in LowerAVXExtend() local
19630 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend()