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Searched refs:__msan_param_tls (Results 1 – 25 of 36) sorted by relevance

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/external/llvm-project/llvm/test/Instrumentation/MemorySanitizer/
Dbmi.ll26 ; CHECK-DAG: %[[SA:.*]] = load i32, {{.*}}@__msan_param_tls to i32*)
27 ; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
42 ; CHECK-DAG: %[[SA:.*]] = load i64, {{.*}}@__msan_param_tls, i32 0, i32 0
43 ; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
59 ; CHECK-DAG: %[[SA:.*]] = load i32, {{.*}}@__msan_param_tls to i32*)
60 ; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
75 ; CHECK-DAG: %[[SA:.*]] = load i64, {{.*}}@__msan_param_tls, i32 0, i32 0
76 ; CHECK-DAG: %[[SB:.*]] = load i64, {{.*}}@__msan_param_tls to i64), i64 8)
92 ; CHECK-DAG: %[[SA:.*]] = load i32, {{.*}}@__msan_param_tls to i32*)
93 ; CHECK-DAG: %[[SB:.*]] = load i32, {{.*}}@__msan_param_tls to i64), i64 8)
[all …]
Dmul_by_constant.ll21 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
33 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
45 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
57 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
69 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
83 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
94 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
107 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
117 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
Darray_types.ll20 ; CHECK-DAG: [[Sx:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i32*)
21 ; CHECK-DAG: [[Sy:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i64), i64 8) to i32*)
36 ; CHECK-DAG: [[Sx:%.*]] = load i64, i64* getelementptr {{.*}}@__msan_param_tls, i32 0, i32 0
37 ; CHECK-DAG: [[Sy:%.*]] = load i64, i64* {{.*}}@__msan_param_tls to i64), i64 8) to i64*)
51 ; CHECK: [[Sa:%.*]] = load [2 x i32], [2 x i32]* {{.*}}@__msan_param_tls to [2 x i32]*)
67 …*]] = load { i32, i32, [3 x i32] }, { i32, i32, [3 x i32] }* {{.*}}@__msan_param_tls to { i32, i32…
79 ; CHECK: [[Ss:%.*]] = load [3 x { i32, i32 }], [3 x { i32, i32 }]* {{.*}}@__msan_param_tls to [3 x …
91 ; CHECK: [[Ss:%.*]] = load [3 x <8 x i16>], [3 x <8 x i16>]* {{.*}}@__msan_param_tls to [3 x <8 x i…
Dclmul.ll21 ; CHECK: %[[S0:.*]] = load <2 x i64>, <2 x i64>* {{.*}}@__msan_param_tls
22 ; CHECK: %[[S1:.*]] = load <2 x i64>, <2 x i64>* {{.*}}@__msan_param_tls
35 ; CHECK: %[[S0:.*]] = load <2 x i64>, <2 x i64>* {{.*}}@__msan_param_tls
36 ; CHECK: %[[S1:.*]] = load <2 x i64>, <2 x i64>* {{.*}}@__msan_param_tls
49 ; CHECK: %[[S0:.*]] = load <4 x i64>, <4 x i64>* {{.*}}@__msan_param_tls
50 ; CHECK: %[[S1:.*]] = load <4 x i64>, <4 x i64>* {{.*}}@__msan_param_tls
63 ; CHECK: %[[S0:.*]] = load <8 x i64>, <8 x i64>* {{.*}}@__msan_param_tls
64 ; CHECK: %[[S1:.*]] = load <8 x i64>, <8 x i64>* {{.*}}@__msan_param_tls
Dno-check-rt-unaligned.ll12 ; CHECK: store i64 0, {{.*}} @__msan_param_tls
24 ; CHECK: store i64 0, {{.*}} @__msan_param_tls
25 ; CHECK: store i8 0, {{.*}} @__msan_param_tls
Dpr32842.ll14 ; CHECK: [[X:[^ ]+]] = load{{.*}}__msan_param_tls{{.*}}
15 ; CHECK: [[Y:[^ ]+]] = load{{.*}}__msan_param_tls{{.*}}
Dmasked-store-load.ll24 ; CHECK: %[[A:.*]] = load <4 x i64>, {{.*}}@__msan_param_tls to i64), i64 8)
52 ; ADDR: %[[ADDRSHADOW:.*]] = load i64, {{.*}}[100 x i64]* @__msan_param_tls, i32 0, i32 0)
53 ; ADDR: %[[MASKSHADOW:.*]] = load <4 x i1>, {{.*}}@__msan_param_tls to i64), i64 40)
75 ; CHECK: %[[A:.*]] = load <4 x i64>, {{.*}}@__msan_param_tls to i64), i64 8)
92 ; ADDR: %[[ADDRSHADOW:.*]] = load i64, {{.*}}[100 x i64]* @__msan_param_tls, i32 0, i32 0)
93 ; ADDR: %[[MASKSHADOW:.*]] = load <4 x i1>, {{.*}}@__msan_param_tls to i64), i64 40)
Datomics.ll151 ; CHECK-NOT: @__msan_param_tls
166 ; CHECK-NOT: @__msan_param_tls
181 ; CHECK-NOT: @__msan_param_tls
196 ; CHECK-NOT: @__msan_param_tls
Dabs-vector.ll13 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* bitcast ([100 x i64]* @__msan_param_tls
35 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* bitcast ([100 x i64]* @__msan_param_tls
57 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* bitcast ([100 x i64]* @__msan_param_tls
79 ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* bitcast ([100 x i64]* @__msan_param_tls
Dcsr.ll28 ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), …
52 ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), …
Dmsan_x86intrinsics.ll62 ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
64 ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
Dbyval-alignment.ll12 …memcpy.p0i8.p0i8.i64(i8* align 8 {{.*}} add {{.*}} ptrtoint {{.*}} @__msan_param_tls {{.*}} i64 8)…
Dorigin-array.ll17 ; CHECK: [[PARAM:%[01-9a-z]+]] = load {{.*}} @__msan_param_tls
Dnosanitize.ll17 ; CHECK-NOT: store {{.*}} @__msan_param_tls
/external/llvm/test/Instrumentation/MemorySanitizer/
Dmul_by_constant.ll19 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
31 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
43 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
55 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
67 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
81 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
92 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
105 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
115 ; CHECK: [[A:%.*]] = load {{.*}} @__msan_param_tls
Darray_types.ll15 ; CHECK-DAG: [[Sy:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i64), i64 8) to i32*)
16 ; CHECK-DAG: [[Sx:%.*]] = load i32, i32* {{.*}}@__msan_param_tls to i32*)
31 ; CHECK-DAG: [[Sy:%.*]] = load i64, i64* {{.*}}@__msan_param_tls to i64), i64 8) to i64*)
32 ; CHECK-DAG: [[Sx:%.*]] = load i64, i64* getelementptr {{.*}}@__msan_param_tls, i32 0, i32 0
46 ; CHECK: [[Sa:%.*]] = load [2 x i32], [2 x i32]* {{.*}}@__msan_param_tls to [2 x i32]*)
62 …*]] = load { i32, i32, [3 x i32] }, { i32, i32, [3 x i32] }* {{.*}}@__msan_param_tls to { i32, i32…
74 ; CHECK: [[Ss:%.*]] = load [3 x { i32, i32 }], [3 x { i32, i32 }]* {{.*}}@__msan_param_tls to [3 x …
86 ; CHECK: [[Ss:%.*]] = load [3 x <8 x i16>], [3 x <8 x i16>]* {{.*}}@__msan_param_tls to [3 x <8 x i…
Datomics.ll145 ; CHECK-NOT: @__msan_param_tls
160 ; CHECK-NOT: @__msan_param_tls
175 ; CHECK-NOT: @__msan_param_tls
190 ; CHECK-NOT: @__msan_param_tls
Dbyval-alignment.ll10 ; CHECK: [[A:%.*]] = bitcast i64* {{.*}} add {{.*}} ptrtoint {{.*}} @__msan_param_tls {{.*}} i64 8)
Dorigin-array.ll15 ; CHECK: [[PARAM:%[01-9a-z]+]] = load {{.*}} @__msan_param_tls
Dmsan_basic.ll16 ; CHECK: @__msan_param_tls = external thread_local(initialexec) global [{{.*}}]
32 ; CHECK: load {{.*}} @__msan_param_tls
56 ; CHECK: load {{.*}} @__msan_param_tls
347 ; CHECK: load i64, i64*{{.*}}__msan_param_tls
361 ; CHECK: load i16, i16*{{.*}}__msan_param_tls
670 ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
672 ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls
806 ; CHECK: store i32 0, i32* {{.*}} @__msan_param_tls
860 ; CHECK: load <2 x i64>, <2 x i64>* {{.*}} @__msan_param_tls {{.*}}, align 8
/external/llvm-project/compiler-rt/lib/msan/
Dmsan.cpp43 THREADLOCAL u64 __msan_param_tls[kMsanParamTlsSize / sizeof(u64)]; variable
254 internal_memset(__msan_param_tls, 0, n * sizeof(*__msan_param_tls)); in UnpoisonParam()
269 internal_memset(__msan_param_tls, 0, sizeof(__msan_param_tls)); in Restore()
565 __msan_param_tls[0] = 0; in __msan_clear_on_return()
667 internal_memcpy(&s, &__msan_param_tls[1], sizeof(uu16)); in __sanitizer_unaligned_store16()
677 internal_memcpy(&s, &__msan_param_tls[1], sizeof(uu32)); in __sanitizer_unaligned_store32()
685 u64 s = __msan_param_tls[1]; in __sanitizer_unaligned_store64()
714 internal_memset(__msan_param_tls, 0, sizeof(__msan_param_tls)); in __msan_finish_switch_fiber()
/external/compiler-rt/lib/msan/
Dmsan.cc43 THREADLOCAL u64 __msan_param_tls[kMsanParamTlsSize / sizeof(u64)]; variable
261 internal_memset(__msan_param_tls, 0, n * sizeof(*__msan_param_tls)); in UnpoisonParam()
276 internal_memset(__msan_param_tls, 0, sizeof(__msan_param_tls)); in Restore()
507 __msan_param_tls[0] = 0; in __msan_clear_on_return()
604 u16 s = *(uu16 *)&__msan_param_tls[1]; in __sanitizer_unaligned_store16()
612 u32 s = *(uu32 *)&__msan_param_tls[1]; in __sanitizer_unaligned_store32()
620 u64 s = __msan_param_tls[1]; in __sanitizer_unaligned_store64()
/external/llvm/test/DebugInfo/X86/
Ddebug-ranges-offset.ll13 @__msan_param_tls = external thread_local(initialexec) global [1000 x i64]
29 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
72 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
94 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
137 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
/external/llvm-project/llvm/test/DebugInfo/X86/
Ddebug-ranges-offset.ll13 @__msan_param_tls = external thread_local(initialexec) global [1000 x i64]
29 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
72 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
94 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
137 …store i64 0, i64* getelementptr inbounds ([1000 x i64], [1000 x i64]* @__msan_param_tls, i64 0, i6…
/external/llvm-project/llvm/test/Instrumentation/MemorySanitizer/X86/
Dvararg_call.ll26 ; CHECK: store i32 0, {{.*}} @__msan_param_tls {{.*}} i64 8
27 ; CHECK: store i32 0, {{.*}} @__msan_param_tls {{.*}} i64 16
28 ; CHECK: store i32 0, {{.*}} @__msan_param_tls {{.*}} i64 24

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