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Searched refs:__msan_retval_tls (Results 1 – 25 of 29) sorted by relevance

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/external/llvm-project/llvm/test/Instrumentation/MemorySanitizer/
Dmul_by_constant.ll23 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
35 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
47 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
59 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
71 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
85 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
96 ; CHECK: store <4 x i32> [[B]], <4 x i32>* {{.*}} @__msan_retval_tls
109 ; CHECK: store i64 [[B]], {{.*}}@__msan_retval_tls
119 ; CHECK: store <2 x i64> [[B]], {{.*}}@__msan_retval_tls
Darray_types.ll24 ; CHECK: store [2 x i32] [[B]], [2 x i32]* {{.*}}@__msan_retval_tls
40 ; CHECK: store [2 x i64] [[B]], [2 x i64]* {{.*}}@__msan_retval_tls
53 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
69 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
81 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
93 ; CHECK: store <8 x i16> [[Sx]], <8 x i16>* {{.*}}@__msan_retval_tls
Datomics.ll25 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
40 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
59 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
78 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
93 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
108 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
123 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
138 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
Dbmi.ll32 ; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
48 ; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
65 ; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
81 ; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
98 ; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
114 ; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
130 ; CHECK-DAG: store i32 %[[S]], {{.*}}@__msan_retval_tls
146 ; CHECK-DAG: store i64 %[[S]], {{.*}}@__msan_retval_tls
Dvector_cvt.ll28 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
47 ; CHECK: store i64 0, {{.*}} @__msan_retval_tls
64 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
Dunreachable.ll23 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
39 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
Dfreeze.ll12 ; CHECK: store i32 [[SHADOW]], {{.*}} @__msan_retval_tls
21 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
Dclmul.ll26 ; CHECK: store <2 x i64> %[[SRET]], <2 x i64>* {{.*}}@__msan_retval_tls
40 ; CHECK: store <2 x i64> %[[SRET]], <2 x i64>* {{.*}}@__msan_retval_tls
54 ; CHECK: store <4 x i64> %[[SRET]], <4 x i64>* {{.*}}@__msan_retval_tls
71 ; CHECK: store <8 x i64> %[[SRET]], <8 x i64>* {{.*}}@__msan_retval_tls
Dreduce.ll23 ; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
43 ; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
64 ; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
Dabs-vector.ll21 ; CHECK-NEXT: store <4 x i64> [[TMP5]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <…
43 ; CHECK-NEXT: store <4 x i64> [[TMP5]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <…
65 ; CHECK-NEXT: store <4 x i64> [[TMP5]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <…
83 ; CHECK-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <…
Dmsan_x86intrinsics.ll45 ; CHECK: store <16 x i8> {{.*}} @__msan_retval_tls
72 ; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls
Dreturn_from_main.ll17 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
Dmsan_basic.ll20 ; CHECK: @__msan_retval_tls = external thread_local(initialexec) global [{{.*}}]
109 ; CHECK: store i32 0,{{.*}}__msan_retval_tls
121 ; CHECK: load{{.*}}__msan_retval_tls
305 ; CHECK: store i32{{.*}}@__msan_retval_tls
329 ; CHECK: store <8 x i16>{{.*}}@__msan_retval_tls
397 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
411 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
445 ; CHECK: store i32 %[[SC]], i32* {{.*}}@__msan_retval_tls
460 ; CHECK: store i32 %[[SA]], i32* {{.*}}@__msan_retval_tls
709 ; CHECK: store <8 x i64> {{.*}} @__msan_retval_tls
[all …]
Dpr32842.ll21 ; CHECK: store i1 [[CMP]],{{.*}}__msan_retval_tls
/external/llvm/test/Instrumentation/MemorySanitizer/
Dmul_by_constant.ll21 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
33 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
45 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
57 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
69 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
83 ; CHECK: store i64 [[B]], i64* {{.*}} @__msan_retval_tls
94 ; CHECK: store <4 x i32> [[B]], <4 x i32>* {{.*}} @__msan_retval_tls
107 ; CHECK: store i64 [[B]], {{.*}}@__msan_retval_tls
117 ; CHECK: store <2 x i64> [[B]], {{.*}}@__msan_retval_tls
Darray_types.ll19 ; CHECK: store [2 x i32] [[B]], [2 x i32]* {{.*}}@__msan_retval_tls
35 ; CHECK: store [2 x i64] [[B]], [2 x i64]* {{.*}}@__msan_retval_tls
48 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
64 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
76 ; CHECK: store i32 [[Sx]], i32* {{.*}}@__msan_retval_tls
88 ; CHECK: store <8 x i16> [[Sx]], <8 x i16>* {{.*}}@__msan_retval_tls
Datomics.ll19 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
34 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
53 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
72 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
87 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
102 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
117 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
132 ; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
Dunreachable.ll22 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
38 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
Dvector_cvt.ll24 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
46 ; CHECK: store <2 x i64> {{.*}}[[Sout]], {{.*}} @__msan_retval_tls
65 ; CHECK: store i64 0, {{.*}} @__msan_retval_tls
Dmsan_basic.ll14 ; CHECK: @__msan_retval_tls = external thread_local(initialexec) global [{{.*}}]
101 ; CHECK: store i32 0,{{.*}}__msan_retval_tls
113 ; CHECK: load{{.*}}__msan_retval_tls
259 ; CHECK: store i32{{.*}}@__msan_retval_tls
283 ; CHECK: store <8 x i16>{{.*}}@__msan_retval_tls
350 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
364 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
653 ; CHECK: store <16 x i8> {{.*}} @__msan_retval_tls
679 ; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls
695 ; CHECK: store <8 x i64> {{.*}} @__msan_retval_tls
[all …]
Dreturn_from_main.ll15 ; CHECK: store i32 0, {{.*}} @__msan_retval_tls
/external/llvm-project/compiler-rt/lib/msan/
Dmsan.cpp52 THREADLOCAL u64 __msan_retval_tls[kMsanRetvalTlsSize / sizeof(u64)]; variable
270 internal_memset(__msan_retval_tls, 0, sizeof(__msan_retval_tls)); in Restore()
644 internal_memcpy(&__msan_retval_tls[0], (void *)MEM_TO_SHADOW((uptr)p), in __sanitizer_unaligned_load16()
651 internal_memcpy(&__msan_retval_tls[0], (void *)MEM_TO_SHADOW((uptr)p), in __sanitizer_unaligned_load32()
658 internal_memcpy(&__msan_retval_tls[0], (void *)MEM_TO_SHADOW((uptr)p), in __sanitizer_unaligned_load64()
715 internal_memset(__msan_retval_tls, 0, sizeof(__msan_retval_tls)); in __msan_finish_switch_fiber()
/external/llvm/test/DebugInfo/X86/
Ddebug-ranges-offset.ll11 @__msan_retval_tls = external thread_local(initialexec) global [8 x i64]
30 …store i64 0, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0),…
32 …%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, …
73 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !28
95 …store i64 0, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0),…
97 …%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, …
138 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !34
144 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !36
/external/llvm-project/llvm/test/DebugInfo/X86/
Ddebug-ranges-offset.ll11 @__msan_retval_tls = external thread_local(initialexec) global [8 x i64]
30 …store i64 0, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0),…
32 …%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, …
73 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !28
95 …store i64 0, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0),…
97 …%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, …
138 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !34
144 store i32 0, i32* bitcast ([8 x i64]* @__msan_retval_tls to i32*), align 8, !dbg !36
/external/compiler-rt/lib/msan/
Dmsan.cc52 THREADLOCAL u64 __msan_retval_tls[kMsanRetvalTlsSize / sizeof(u64)]; variable
277 internal_memset(__msan_retval_tls, 0, sizeof(__msan_retval_tls)); in Restore()
586 *(uu16 *)&__msan_retval_tls[0] = *(uu16 *)MEM_TO_SHADOW((uptr)p); in __sanitizer_unaligned_load16()
592 *(uu32 *)&__msan_retval_tls[0] = *(uu32 *)MEM_TO_SHADOW((uptr)p); in __sanitizer_unaligned_load32()
598 __msan_retval_tls[0] = *(uu64 *)MEM_TO_SHADOW((uptr)p); in __sanitizer_unaligned_load64()

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