Home
last modified time | relevance | path

Searched refs:_abs (Results 1 – 9 of 9) sorted by relevance

/external/llvm/test/Transforms/InstSimplify/
Dcall-callconv.ll6 define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
7 ; CHECK: _abs
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dcall-callconv.ll7 define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
8 ; CHECK-LABEL: @_abs(
/external/igt-gpu-tools/assembler/
Dbrw_disasm.c109 static const char * const _abs[2] = { variable
609 err |= control (file, "abs", _abs, __abs, NULL); in src_da1()
635 err |= control (file, "abs", _abs, __abs, NULL); in src_ia1()
663 err |= control (file, "abs", _abs, __abs, NULL); in src_da16()
714 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL); in src0_3src()
765 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL); in src1_3src()
816 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL); in src2_3src()
Dgen8_disasm.c462 unsigned reg_num, unsigned sub_reg_num, unsigned _abs, unsigned negate) in src_da1() argument
466 err |= control(file, "abs", m_abs, _abs, NULL); in src_da1()
485 unsigned _abs, in src_da16() argument
494 err |= control(file, "abs", m_abs, _abs, NULL); in src_da16()
/external/python/cpython3/Lib/
Doperator.py22 from builtins import abs as _abs unknown
73 return _abs(a)
/external/mesa3d/src/intel/compiler/
Dbrw_disasm.c120 static const char *const _abs[2] = { variable
907 err |= control(file, "abs", _abs, __abs, NULL); in src_da1()
939 err |= control(file, "abs", _abs, __abs, NULL); in src_ia1()
994 err |= control(file, "abs", _abs, __abs, NULL); in src_da16()
1171 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL); in src0_3src()
1244 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL); in src1_3src()
1331 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL); in src2_3src()
/external/llvm-project/lld/test/MachO/
Dstabs.s58 # CHECK-NEXT: {{[0-9af]+}} A _abs
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV4.td3424 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3526 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3575 let BaseOpcode = BaseOp#_abs;
3584 let BaseOpcode = BaseOp#_abs in {
3727 def _abs : T_LoadAbs_Pred <mnemonic, RC, MajOp, PredNot, 0>;
3735 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3737 def L4_#NAME#_abs: T_LoadAbs <mnemonic, RC, ImmOp, MajOp>;
3772 let BaseOpcode = BaseOp#_abs;
/external/tensorflow/tensorflow/python/ops/
Dmath_ops.py411 return gen_math_ops._abs(x, name=name)