| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | asm_macros.S | 18 #define TLB_INVALIDATE(_reg, _coproc) \ argument
19 stcopr _reg, _coproc; \
21 stcopr _reg, _coproc
23 #define TLB_INVALIDATE(_reg, _coproc) \ argument
24 stcopr _reg, _coproc
126 .macro stl _reg, _write_lock
128 str \_reg, \_write_lock
137 .macro mov_imm _reg, _val
139 mov \_reg, #(\_val)
141 movw \_reg, #((\_val) & 0xffff)
[all …]
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | asm_macros.S | 135 .macro _mov_imm16 _reg, _val, _shift
138 movk \_reg, (\_val >> \_shift) & 0xffff, LSL \_shift
140 mov \_reg, \_val & (0xffff << \_shift)
151 .macro mov_imm _reg, _val
153 mov \_reg, #0
155 _mov_imm16 \_reg, (\_val), 0
156 _mov_imm16 \_reg, (\_val), 16
157 _mov_imm16 \_reg, (\_val), 32
158 _mov_imm16 \_reg, (\_val), 48
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| /external/arm-trusted-firmware/plat/intel/soc/common/include/ |
| D | socfpga_system_manager.h | 52 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ argument
53 + (SOCFPGA_SYSMGR_##_reg))
55 #define SOCFPGA_L4_PER_SCR(_reg) (SOCFPGA_L4_PER_SCR_REG_BASE \ argument
56 + (SOCFPGA_NOC_FW_L4_PER_SCR_##_reg))
58 #define SOCFPGA_L4_SYS_SCR(_reg) (SOCFPGA_L4_SYS_SCR_REG_BASE \ argument
59 + (SOCFPGA_NOC_FW_L4_SYS_SCR_##_reg))
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| D | socfpga_reset_manager.h | 96 #define SOCFPGA_RSTMGR(_reg) (SOCFPGA_RSTMGR_REG_BASE \ argument
97 + (SOCFPGA_RSTMGR_##_reg))
98 #define RSTMGR_FIELD(_reg, _field) (RSTMGR_##_reg##MODRST_##_field) argument
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| /external/arm-trusted-firmware/include/lib/cpus/aarch64/ |
| D | cpu_macros.S | 270 .macro cpu_check_csv2 _reg _label
271 mrs \_reg, id_aa64pfr0_el1
272 ubfx \_reg, \_reg, #ID_AA64PFR0_CSV2_SHIFT, #ID_AA64PFR0_CSV2_LENGTH
284 cmp \_reg, #3 /* Only values 0 to 2 are expected */
288 cmp \_reg, #0
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| /external/ethtool/ |
| D | fec.c | 8 #define REG(_reg, _name, _val) \ argument
9 printf("0x%.03x: %-44.44s 0x%.8x\n", _reg, _name, _val)
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| D | dsa.c | 8 #define REG(_reg, _name, _val) \ argument
9 printf("%.02u: %-38.38s 0x%.4x\n", _reg, _name, _val)
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| /external/capstone/arch/PowerPC/ |
| D | PPCInstPrinter.c | 746 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera… in printAliasInstrEx() argument
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| D | PPCGenAsmWriter.inc | 4976 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| /external/icu/icu4c/source/i18n/ |
| D | transreg.cpp | 854 TransliteratorRegistry::Enumeration::Enumeration(const TransliteratorRegistry& _reg) : in Enumeration() argument
855 index(0), reg(_reg) { in Enumeration()
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| /external/capstone/bindings/ocaml/ |
| D | ocaml.c | 1058 CAMLprim value ocaml_register_name(value _handle, value _reg) in ocaml_register_name() argument
1060 const char *name = cs_reg_name(Int64_val(_handle), Int_val(_reg)); in ocaml_register_name()
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| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 1349 #define GETREGCLASS_CONTAIN0(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI,… in printVectorList() argument
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| D | AArch64GenAsmWriter.inc | 7082 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| /external/capstone/arch/X86/ |
| D | X86GenAsmWriter_reduce.inc | 3169 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| D | X86GenAsmWriter1_reduce.inc | 4587 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| D | X86GenAsmWriter1.inc | 20505 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| D | X86GenAsmWriter.inc | 21124 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 1190 A##B##_##C##_reg = LoadStoreRegisterOffsetFixed | D
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| D | disasm-aarch64.cc | 1161 case A##_reg: \ in VisitLoadStoreRegisterOffset()
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| /external/capstone/arch/Sparc/ |
| D | SparcGenAsmWriter.inc | 1221 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 5291 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 8745 …SS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOpera…
|