| /external/mesa3d/src/mesa/state_tracker/tests/ |
| D | test_glsl_to_tgsi_array_merge.cpp | 53 EXPECT_EQ(a1.access_mask(), WRITEMASK_X); in TEST_F()
65 EXPECT_EQ(a2.access_mask(), WRITEMASK_X); in TEST_F()
85 EXPECT_EQ(a1.access_mask(), WRITEMASK_X); in TEST_F()
97 EXPECT_EQ(a2.access_mask(), WRITEMASK_X); in TEST_F()
119 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW); in TEST_F()
150 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW); in TEST_F()
182 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY); in TEST_F()
224 EXPECT_EQ(a2.access_mask(), WRITEMASK_XY); in TEST_F()
241 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY); in TEST_F()
271 EXPECT_EQ(a1.access_mask(), WRITEMASK_X); in TEST_F()
[all …]
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| D | st_tests_common.cpp | 559 EXPECT_EQ(lifetimes[i].access_mask(), e[i].access_mask()); in check()
580 EXPECT_EQ(lifetimes[i].access_mask()| e[i].access_mask(), in check()
581 e[i].access_mask()); in check()
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| /external/tinyalsa_new/tests/src/ |
| D | pcm_params_test.cc | 135 const pcm_mask *access_mask = pcm_params_get_mask(params, PCM_PARAM_ACCESS); in TEST() local
136 ASSERT_NE(access_mask, nullptr); in TEST()
137 ASSERT_NE(OrAllBits(access_mask), 0); in TEST()
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| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_liverange.h | 203 int access_mask; variable
239 int access_mask() const { return component_access_mask;} in access_mask() function
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| D | sfn_liverange.cpp | 286 access_mask(0), in temp_access()
294 if (access_mask && access_mask != mask) in update_access_mask()
296 access_mask |= mask; in update_access_mask()
344 unsigned mask = access_mask; in get_required_live_range()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu_validate.c | 1054 uint64_t access_mask = 0; in general_restrictions_on_region_parameters() local
1058 access_mask |= mask << (offset % 64); in general_restrictions_on_region_parameters()
1064 if ((uint32_t)access_mask != 0 && (access_mask >> 32) != 0) { in general_restrictions_on_region_parameters()
1316 align1_access_mask(uint64_t access_mask[static 32], in align1_access_mask()
1328 access_mask[element++] = mask << (offset % 64); in align1_access_mask()
1342 registers_read(const uint64_t access_mask[static 32]) in registers_read()
1347 if (access_mask[i] > 0xFFFFFFFF) { in registers_read()
1349 } else if (access_mask[i]) { in registers_read()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi_temprename.cpp | 239 int access_mask; member in __anona9d7d0190111::temp_access
493 access_mask(0), in temp_access()
500 if (access_mask && access_mask != mask) in update_access_mask()
502 access_mask |= mask; in update_access_mask()
625 unsigned mask = access_mask; in get_required_live_range()
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| D | st_glsl_to_tgsi_array_merge.cpp | 232 int trgt_access_mask = other->access_mask(); in interleave_into()
503 if (range_1.access_mask() == range_2.access_mask()) { in do_run()
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| D | st_glsl_to_tgsi_array_merge.h | 66 int access_mask() const { return component_access_mask;} in access_mask() function
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| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 1219 uint16_t Simulator::PrintPartialAccess(uint16_t access_mask, in PrintPartialAccess() argument
1227 VIXL_ASSERT(access_mask != 0); in PrintPartialAccess()
1236 bool access = (access_mask & (1 << lane)) != 0; in PrintPartialAccess()
1276 return future_access_mask & ~access_mask; in PrintPartialAccess()
1339 uint16_t access_mask = 1 << i; in PrintVStructAccess() local
1340 VIXL_ASSERT((lane_mask & access_mask) != 0); in PrintVStructAccess()
1341 lane_mask = PrintPartialAccess(access_mask, in PrintVStructAccess()
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| D | simulator-aarch64.h | 2350 uint16_t PrintPartialAccess(uint16_t access_mask,
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| /external/vulkan-validation-layers/layers/ |
| D | core_validation.cpp | 8373 …bool ValidateAccessMaskPipelineStage(const DeviceExtensions &extensions, VkAccessFlags access_mask, in ValidateAccessMaskPipelineStage() argument
8376 if ((stage_mask & VK_PIPELINE_STAGE_ALL_COMMANDS_BIT) || (0 == access_mask)) return true; in ValidateAccessMaskPipelineStage()
8381 while (access_mask) { in ValidateAccessMaskPipelineStage()
8382 index = (u_ffs(access_mask) - 1); in ValidateAccessMaskPipelineStage()
8386 …access_mask &= ~(1 << index); // Mask off bit that's been c… in ValidateAccessMaskPipelineStage()
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