| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | addpl.s | 10 addpl x21, x21, #0 label
16 addpl x23, x8, #-1 label
22 addpl sp, sp, #31 label
28 addpl x0, x0, #-32 label
|
| D | addpl-diagnostics.s | 4 addpl x19, x14, #32 label
10 addpl x19, x14, x15 label
|
| /external/libhevc/common/arm/ |
| D | ihevc_deblk_chroma_horz.s | 106 addpl r1,r1,#2
121 addpl r2,r2,#2
|
| D | ihevc_deblk_chroma_vert.s | 107 addpl r3,r3,#2
124 addpl r2,r2,#2
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 3 # CHECK: addpl r4, pc, #76, #10
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 3 # CHECK: addpl r4, pc, #76, #10
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-sve-aarch64.cc | 199 addpl(xd, xn, static_cast<int>(multiplier)); in Addpl()
215 addpl(xd, xd, static_cast<int>(multiplier)); in Addpl()
|
| D | assembler-aarch64.h | 3607 void addpl(const Register& xd, const Register& xn, int imm6);
|
| D | assembler-sve-aarch64.cc | 6281 void Assembler::addpl(const Register& xd, const Register& xn, int imm6) { in addpl() function in vixl::aarch64::Assembler
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-sve-aarch64.cc | 6251 COMPARE_PREFIX(addpl(x20, x6, 0), "addpl x20, x6, #0"); in TEST()
6252 COMPARE_PREFIX(addpl(x21, x7, 31), "addpl x21, x7, #31"); in TEST()
6253 COMPARE_PREFIX(addpl(x22, x8, -32), "addpl x22, x8, #-32"); in TEST()
6254 COMPARE_PREFIX(addpl(sp, x1, 5), "addpl sp, x1, #5"); in TEST()
6255 COMPARE_PREFIX(addpl(x9, sp, -16), "addpl x9, sp, #-16"); in TEST()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 841 def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 1287 def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12475 "hn2\006addhnb\006addhnt\004addp\005addpl\004adds\004addv\005addvl\003ad"
12813 …{ 66 /* addpl */, AArch64::ADDPL_XXI, Convert__Reg1_0__Reg1_1__SImm61_2, AMFBS_HasSVE, { MCK_GPR64…
20186 …{ 66 /* addpl */, AArch64::ADDPL_XXI, Convert__Reg1_0__Reg1_1__SImm61_2, AMFBS_HasSVE, { MCK_GPR64…
|