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/external/llvm-project/llvm/test/tools/llvm-mca/X86/Barcelona/
Drcu-statistics.s5 addps %xmm0, %xmm1 label
6 addps %xmm0, %xmm1 label
7 addps %xmm0, %xmm1 label
8 addps %xmm0, %xmm1 label
9 addps %xmm0, %xmm1 label
10 addps %xmm0, %xmm1 label
11 addps %xmm0, %xmm1 label
12 addps %xmm0, %xmm1 label
13 addps %xmm0, %xmm1 label
14 addps %xmm0, %xmm1 label
[all …]
Dclear-super-register-2.s5 # so addps can start immediately, without waiting for sqrtss to finish.
11 addps %xmm0, %xmm0 label
17 addps %xmm0, %xmm0 label
43 # CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm0
51 # CHECK-NEXT: [0,2] D======eeeE-----R . . . . . . addps %xmm0, %xmm0
54 # CHECK-NEXT: [1,2] .D======eeeE------------------R . . . addps %xmm0, %xmm0
57 # CHECK-NEXT: [2,2] . D======eeeE-------------------------------R addps %xmm0, %xmm0
68 # CHECK-NEXT: 2. 3 7.0 0.3 18.0 addps %xmm0, %xmm0
94 # CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm0
102 # CHECK-NEXT: [0,2] D======eeeE------------R . . . . . . . . . addps …
[all …]
Dreg-move-elimination-1.s9 addps %xmm1, %xmm1 label
32 # CHECK-NEXT: 1 3 1.00 addps %xmm1, %xmm1
56 # CHECK-NEXT: - - - 1.00 - - - - addps %xmm1, %xmm1
63 # CHECK-NEXT: [0,2] D=eeeER . addps %xmm1, %xmm1
66 # CHECK-NEXT: [1,2] .D=eeeER. addps %xmm1, %xmm1
69 # CHECK-NEXT: [2,2] . D=eeeER addps %xmm1, %xmm1
80 # CHECK-NEXT: 2. 3 2.0 0.0 0.0 addps %xmm1, %xmm1
Dread-advance-1.s8 addps %xmm0, %xmm1 label
30 # CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
37 # CHECK: [0,0] DeeeER . . addps %xmm0, %xmm1
47 # CHECK-NEXT: 0. 1 1.0 1.0 0.0 addps %xmm0, %xmm1
/external/llvm-project/llvm/test/CodeGen/X86/
Dsse-intel-ocl.ll8 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
9 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
10 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
11 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
18 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
19 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
20 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
21 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
26 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}}
27 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}}
[all …]
Dsse-regcall.ll144 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
145 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
146 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
147 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
148 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
149 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
150 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
151 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
152 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
153 ; X32: addps {{([0-9])+}}(%ebp), {{%xmm([0-7])}}
[all …]
Dv2f32.ll31 ; X64-NEXT: addps %xmm1, %xmm0
36 ; X32-NEXT: addps %xmm1, %xmm0
45 ; X64-NEXT: addps %xmm0, %xmm0
50 ; X32-NEXT: addps %xmm0, %xmm0
60 ; X64-NEXT: addps %xmm0, %xmm0
65 ; X32-NEXT: addps %xmm0, %xmm0
74 ; X64-NEXT: addps %xmm0, %xmm0
75 ; X64-NEXT: addps %xmm0, %xmm0
80 ; X32-NEXT: addps %xmm0, %xmm0
81 ; X32-NEXT: addps %xmm0, %xmm0
Dhorizontal-reduce-fadd.ll16 ; SSE2-NEXT: addps %xmm0, %xmm1
26 ; SSSE3-SLOW-NEXT: addps %xmm0, %xmm1
130 ; SSE2-NEXT: addps %xmm1, %xmm0
133 ; SSE2-NEXT: addps %xmm0, %xmm1
141 ; SSSE3-SLOW-NEXT: addps %xmm1, %xmm0
144 ; SSSE3-SLOW-NEXT: addps %xmm0, %xmm1
152 ; SSSE3-FAST-NEXT: addps %xmm1, %xmm0
272 ; SSE2-NEXT: addps %xmm3, %xmm1
273 ; SSE2-NEXT: addps %xmm2, %xmm1
274 ; SSE2-NEXT: addps %xmm0, %xmm1
[all …]
Dpr32368.ll11 ; SSE-NEXT: addps %xmm0, %xmm0
55 ; SSE-NEXT: addps %xmm1, %xmm1
56 ; SSE-NEXT: addps %xmm0, %xmm0
104 ; SSE-NEXT: addps %xmm3, %xmm3
105 ; SSE-NEXT: addps %xmm2, %xmm2
106 ; SSE-NEXT: addps %xmm1, %xmm1
107 ; SSE-NEXT: addps %xmm0, %xmm0
Dvector-reduce-fadd-fast.ll65 ; SSE2-NEXT: addps %xmm1, %xmm2
76 ; SSE41-NEXT: addps %xmm1, %xmm2
122 ; SSE2-NEXT: addps %xmm2, %xmm1
125 ; SSE2-NEXT: addps %xmm1, %xmm2
134 ; SSE41-NEXT: addps %xmm2, %xmm1
137 ; SSE41-NEXT: addps %xmm1, %xmm2
195 ; SSE2-NEXT: addps %xmm4, %xmm2
196 ; SSE2-NEXT: addps %xmm3, %xmm1
197 ; SSE2-NEXT: addps %xmm2, %xmm1
200 ; SSE2-NEXT: addps %xmm1, %xmm2
[all …]
Dillegal-vector-args-return.ll19 ; CHECK-NEXT: addps %xmm2, %xmm0
20 ; CHECK-NEXT: addps %xmm3, %xmm1
Dmachine-combiner.ll227 ; SSE-NEXT: addps %xmm3, %xmm2
228 ; SSE-NEXT: addps %xmm2, %xmm0
282 ; SSE-NEXT: addps %xmm1, %xmm0
328 ; SSE-NEXT: addps %xmm6, %xmm4
329 ; SSE-NEXT: addps %xmm4, %xmm0
330 ; SSE-NEXT: addps %xmm7, %xmm5
331 ; SSE-NEXT: addps %xmm5, %xmm1
388 ; SSE-NEXT: addps %xmm2, %xmm0
389 ; SSE-NEXT: addps %xmm3, %xmm1
442 ; SSE-NEXT: addps {{[0-9]+}}(%rsp), %xmm3
[all …]
Dvec_uint_to_fp.ll51 ; SSE-NEXT: addps [[MASK]], %xmm0
61 ; SSE41-NEXT: addps [[LOWVEC]], %xmm0
112 ; SSE-NEXT: addps [[VECLOW]], %xmm0
119 ; SSE-NEXT: addps %[[MASK]], %xmm1
130 ; SSE41-NEXT: addps [[VECLOW]], %xmm0
138 ; SSE41-NEXT: addps %[[LOWCST]], %xmm1
Dvec_uint_to_fp-fastmath.ll52 ; SSE2-NEXT: addps [[MASK]], %xmm0
63 ; SSE41-NEXT: addps [[LOWVEC]], %xmm0
129 ; SSE2-NEXT: addps [[VECLOW]], %xmm0
136 ; SSE2-NEXT: addps %[[MASK]], %xmm1
148 ; SSE41-NEXT: addps [[VECLOW]], %xmm0
156 ; SSE41-NEXT: addps %[[LOWCST]], %xmm1
/external/llvm/test/CodeGen/X86/
Dsse-intel-ocl.ll8 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
9 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
10 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
11 ; WIN64: addps {{.*}}, {{%xmm[0-3]}}
18 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
19 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
20 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
21 ; WIN32: addps {{.*}}, {{%xmm[0-3]}}
26 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}}
27 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}}
[all …]
Dv2f32.ll31 ; X64-NEXT: addps %xmm1, %xmm0
36 ; X32-NEXT: addps %xmm1, %xmm0
45 ; X64-NEXT: addps %xmm0, %xmm0
50 ; X32-NEXT: addps %xmm0, %xmm0
60 ; X64-NEXT: addps %xmm0, %xmm0
65 ; X32-NEXT: addps %xmm0, %xmm0
74 ; X64-NEXT: addps %xmm0, %xmm0
75 ; X64-NEXT: addps %xmm0, %xmm0
80 ; X32-NEXT: addps %xmm0, %xmm0
81 ; X32-NEXT: addps %xmm0, %xmm0
Dvec_uint_to_fp.ll50 ; SSE-NEXT: addps [[MAGICCSTADDR]](%rip), %xmm0
51 ; SSE-NEXT: addps [[MASK]], %xmm0
60 ; SSE41-NEXT: addps [[MAGICCSTADDR]](%rip), %xmm0
61 ; SSE41-NEXT: addps [[LOWVEC]], %xmm0
111 ; SSE-NEXT: addps %[[MAGICCST]], %xmm0
112 ; SSE-NEXT: addps [[VECLOW]], %xmm0
118 ; SSE-NEXT: addps %[[MAGICCST]], %xmm1
119 ; SSE-NEXT: addps %[[MASK]], %xmm1
129 ; SSE41-NEXT: addps %[[MAGICCST]], %xmm0
130 ; SSE41-NEXT: addps [[VECLOW]], %xmm0
[all …]
Dvec_extract.ll11 ; X32-NEXT: addps %xmm0, %xmm0
18 ; X64-NEXT: addps %xmm0, %xmm0
35 ; X32-NEXT: addps %xmm0, %xmm0
45 ; X64-NEXT: addps %xmm0, %xmm0
Dillegal-vector-args-return.ll3 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1"
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0"
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dclear-super-register-3.s5 # so addps can start immediately, without waiting for sqrtss to finish.
11 addps %xmm0, %xmm0 label
17 addps %xmm0, %xmm0 label
43 # CHECK-NEXT: 1 5 1.00 addps %xmm0, %xmm0
51 # CHECK-NEXT: [0,2] D======eeeeeER . . . addps %xmm0, %xmm0
54 # CHECK-NEXT: [1,2] .D=========eeeeeE-----R addps %xmm0, %xmm0
65 # CHECK-NEXT: 2. 2 8.5 1.5 2.5 addps %xmm0, %xmm0
91 # CHECK-NEXT: 1 5 1.00 addps %xmm0, %xmm0
99 # CHECK-NEXT: [0,2] D======eeeeeER . . . addps %xmm0, %xmm0
102 # CHECK-NEXT: [1,2] .D=========eeeeeE-----R addps %xmm0, %xmm0
[all …]
/external/llvm-project/polly/docs/experiments/matmul/
Dmatmul.polly.interchanged+tiled.s355 addps %xmm1, %xmm15
358 addps %xmm1, %xmm14
361 addps %xmm1, %xmm13
364 addps %xmm1, %xmm12
367 addps %xmm1, %xmm11
370 addps %xmm1, %xmm10
373 addps %xmm1, %xmm9
376 addps %xmm1, %xmm8
379 addps %xmm1, %xmm7
382 addps %xmm1, %xmm6
[all …]
Dmatmul.polly.interchanged+tiled+vector.s319 addps %xmm10, %xmm8
321 addps %xmm5, %xmm6
323 addps %xmm12, %xmm14
326 addps %xmm7, %xmm4
394 addps %xmm14, %xmm15
396 addps %xmm12, %xmm6
398 addps %xmm7, %xmm4
400 addps -64(%rbp), %xmm10 # 16-byte Folded Reload
467 addps %xmm10, %xmm11
469 addps %xmm12, %xmm7
[all …]
/external/mesa3d/src/mesa/x86-64/
Dxform4.S101 addps %xmm1, %xmm0 /* ox*m3+oy*m7 | ... */
103 addps %xmm2, %xmm0 /* ox*m3+oy*m7+oz*m11 | ... */
105 addps %xmm3, %xmm0 /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
187 addps %xmm1, %xmm0 /* ox*m3+oy*m7 | ... */
189 addps %xmm2, %xmm0 /* ox*m3+oy*m7+oz*m11 | ... */
191 addps %xmm3, %xmm0 /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
/external/llvm-project/llvm/test/MC/X86/
DSSE-32.s5 addps -485498096(%edx,%eax,4), %xmm1 label
9 addps 485498096(%edx,%eax,4), %xmm1 label
13 addps 485498096(%edx), %xmm1 label
17 addps 485498096, %xmm1 label
21 addps 64(%edx,%eax), %xmm1 label
25 addps (%edx), %xmm1 label
29 addps %xmm1, %xmm1 label
DSSE-64.s5 addps 485498096, %xmm6 label
9 addps -64(%rdx,%rax,4), %xmm6 label
13 addps 64(%rdx,%rax,4), %xmm6 label
17 addps 64(%rdx,%rax), %xmm6 label
21 addps 64(%rdx), %xmm6 label
25 addps (%rdx), %xmm6 label
29 addps %xmm6, %xmm6 label

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