Searched refs:address32_hi (Results 1 – 14 of 14) sorted by relevance
| /external/mesa3d/src/amd/common/ |
| D | ac_gpu_info.h | 98 uint32_t address32_hi; member
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| D | ac_gpu_info.c | 321 r = amdgpu_query_sw_info(dev, amdgpu_sw_info_address32_hi, &info->address32_hi); in ac_query_gpu_info()
910 fprintf(f, " address32_hi = %u\n", info->address32_hi); in ac_print_gpu_info()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_compute_prim_discard.c | 253 uint64_t hi = (uint64_t)ctx->screen->info.address32_hi << 32; in si_expand_32bit_pointer()
770 LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0), in si_build_prim_discard_compute_shader()
1129 sctx->compute_rewind_va | ((uint64_t)sctx->screen->info.address32_hi << 32), in si_compute_signal_gfx()
1417 assert((gfx_cs->gpu_address >> 32) == sctx->screen->info.address32_hi); in si_dispatch_prim_discard_cs_and_draw()
1426 sctx->compute_rewind_va | (uint64_t)sctx->screen->info.address32_hi << 32, in si_dispatch_prim_discard_cs_and_draw()
1518 count_va | ((uint64_t)sctx->screen->info.address32_hi << 32), in si_dispatch_prim_discard_cs_and_draw()
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| D | si_shader_llvm_resources.c | 70 desc1 = LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0); in load_const_buffer_desc_fast_path()
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| D | si_shader_llvm.c | 187 if (ctx->screen->info.address32_hi) { in si_llvm_create_func()
189 ctx->screen->info.address32_hi); in si_llvm_create_func()
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| D | si_buffer.c | 239 assert((start >> 32) == sscreen->info.address32_hi); in si_alloc_resource()
240 assert((last >> 32) == sscreen->info.address32_hi); in si_alloc_resource()
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| D | si_descriptors.c | 175 assert((desc->buffer->gpu_address >> 32) == sctx->screen->info.address32_hi); in si_upload_descriptors()
176 assert((desc->gpu_address >> 32) == sctx->screen->info.address32_hi); in si_upload_descriptors()
1970 assert(va == 0 || (va >> 32) == sscreen->info.address32_hi); in si_emit_shader_pointer_body()
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| D | si_shader_llvm_tess.c | 367 desc[1] = LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0); in get_tess_ring_descriptor()
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| D | si_pipe.c | 947 sscreen->info.address32_hi); in si_disk_cache_create()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_shader.h | 150 uint32_t address32_hi; member
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| D | radv_shader.c | 1305 options->address32_hi = device->physical_device->rad_info.address32_hi; in shader_variant_compile()
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| D | radv_nir_to_llvm.c | 246 if (options->address32_hi) { in create_llvm_function()
249 options->address32_hi); in create_llvm_function()
912 LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->args->options->address32_hi), false), in radv_load_ubo()
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| D | radv_private.h | 1602 (va >> 32) == device->physical_device->rad_info.address32_hi); in radv_emit_shader_pointer_body()
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 718 ptr, Operand((unsigned)ctx->options->address32_hi)); in convert_pointer_to_64_bit()
5141 Operand((unsigned)ctx->options->address32_hi)); in visit_load_resource()
5192 Operand(S_008F04_BASE_ADDRESS_HI(ctx->options->address32_hi)), in visit_load_ubo()
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