| /external/vixl/src/aarch32/ |
| D | operands-aarch32.h | 637 explicit MemOperand(Register rn, AddrMode addrmode = Offset)
644 addrmode_(addrmode | kMemOperandRegisterOnly) { in rn_()
654 MemOperand(Register rn, int32_t offset, AddrMode addrmode = Offset)
661 addrmode_(addrmode) { in rn_()
664 MemOperand(Register rn, Sign sign, int32_t offset, AddrMode addrmode = Offset)
671 addrmode_(addrmode) { in rn_()
681 MemOperand(Register rn, Sign sign, Register rm, AddrMode addrmode = Offset)
688 addrmode_(addrmode) { in rn_()
695 MemOperand(Register rn, Register rm, AddrMode addrmode = Offset)
702 addrmode_(addrmode) { in rn_()
[all …]
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| D | macro-assembler-aarch32.cc | 313 AddrMode addrmode) { in GetOffsetMask() argument
319 if (IsUsingA32() || (addrmode == Offset)) { in GetOffsetMask()
328 if (IsUsingT32() && (addrmode == Offset)) { in GetOffsetMask()
1710 AddrMode addrmode = operand.GetAddrMode(); in Delegate() local
1712 uint32_t extra_offset_mask = GetOffsetMask(type, addrmode); in Delegate()
1722 switch (addrmode) { in Delegate()
1795 AddrMode addrmode = operand.GetAddrMode(); in Delegate() local
1803 if (addrmode == Offset) { in Delegate()
1815 switch (addrmode) { in Delegate()
1932 AddrMode addrmode = operand.GetAddrMode(); in Delegate() local
[all …]
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| D | disasm-aarch32.cc | 7776 AddrMode addrmode = Offset; in DecodeT32() local
7781 MemOperand(Register(rn), sign, Register(rm), addrmode)); in DecodeT32()
7790 AddrMode addrmode = Offset; in DecodeT32() local
7795 MemOperand(Register(rn), sign, Register(rm), addrmode)); in DecodeT32()
7804 AddrMode addrmode = Offset; in DecodeT32() local
7809 MemOperand(Register(rn), sign, Register(rm), addrmode)); in DecodeT32()
7818 AddrMode addrmode = Offset; in DecodeT32() local
7823 MemOperand(Register(rn), sign, Register(rm), addrmode)); in DecodeT32()
7838 AddrMode addrmode = Offset; in DecodeT32() local
7843 MemOperand(Register(rn), sign, Register(rm), addrmode)); in DecodeT32()
[all …]
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| D | macro-assembler-aarch32.h | 384 uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.cc | 244 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode) in MemOperand() argument
248 addrmode_(addrmode), in MemOperand()
293 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode) in MemOperand() argument
296 addrmode_(addrmode), in MemOperand()
305 VIXL_ASSERT((addrmode == Offset) || (addrmode == PostIndex)); in MemOperand()
319 VIXL_ASSERT(addrmode == Offset); in MemOperand()
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| D | operands-aarch64.h | 392 AddrMode addrmode = Offset);
401 MemOperand(Register base, const Operand& offset, AddrMode addrmode = Offset);
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| D | simulator-aarch64.cc | 2145 AddrMode addrmode) { in LoadStoreHelper() argument
2147 uintptr_t address = AddressModeHelper(instr->GetRn(), offset, addrmode); in LoadStoreHelper()
2300 AddrMode addrmode) { in LoadStorePairHelper() argument
2305 uintptr_t address = AddressModeHelper(instr->GetRn(), offset, addrmode); in LoadStorePairHelper()
3061 AddrMode addrmode) { in AddressModeHelper() argument
3071 if ((addrmode == PreIndex) || (addrmode == PostIndex)) { in AddressModeHelper()
3076 RegLogMode log_mode = (addrmode == PreIndex) ? LogRegWrites : NoRegLog; in AddressModeHelper()
3080 if ((addrmode == Offset) || (addrmode == PreIndex)) { in AddressModeHelper()
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| D | simulator-aarch64.h | 2797 AddrMode addrmode);
2798 void LoadStorePairHelper(const Instruction* instr, AddrMode addrmode);
2815 AddrMode addrmode);
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| /external/llvm-project/llvm/test/CodeGen/Thumb/ |
| D | addr-modes.ll | 17 ; CHECK: local addrmode: [inbounds Base:%arrayidx]
27 ; CHECK: local addrmode: [inbounds Base:%p + 1*%n]
37 ; CHECK: local addrmode: [2*%x]
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| /external/capstone/arch/ARM/ |
| D | ARMBaseInfo.h | 225 inline static const char *ARMII_AddrModeToString(ARMII_AddrMode addrmode) in ARMII_AddrModeToString() argument
227 switch (addrmode) { in ARMII_AddrModeToString()
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| D | ARMDisassembler.c | 3344 unsigned addrmode; in DecodeT2LoadShift() local
3411 addrmode = fieldFromInstruction_4(Insn, 4, 2); in DecodeT2LoadShift()
3412 addrmode |= fieldFromInstruction_4(Insn, 0, 4) << 2; in DecodeT2LoadShift()
3413 addrmode |= fieldFromInstruction_4(Insn, 16, 4) << 6; in DecodeT2LoadShift()
3414 if (!Check(&S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) in DecodeT2LoadShift()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 210 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString() argument
211 switch (addrmode) { in AddrModeToString()
|
| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 210 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString() argument
211 switch (addrmode) { in AddrModeToString()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 255 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString() argument
256 switch (addrmode) { in AddrModeToString()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 3429 unsigned addrmode = fieldFromInstruction(Insn, 4, 2); in DecodeT2LoadShift() local
3430 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2; in DecodeT2LoadShift()
3431 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6; in DecodeT2LoadShift()
3432 if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) in DecodeT2LoadShift()
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| /external/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 3858 unsigned addrmode = fieldFromInstruction(Insn, 4, 2); in DecodeT2LoadShift() local
3859 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2; in DecodeT2LoadShift()
3860 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6; in DecodeT2LoadShift()
3861 if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) in DecodeT2LoadShift()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 3837 unsigned addrmode = fieldFromInstruction(Insn, 4, 2); in DecodeT2LoadShift() local
3838 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2; in DecodeT2LoadShift()
3839 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6; in DecodeT2LoadShift()
3840 if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) in DecodeT2LoadShift()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4932 class SExtLoadi8CVTf32Pat<dag addrmode, dag INST>
4933 : Pat<(f32 (sint_to_fp (i32 (sextloadi8 addrmode)))),
4958 class SExtLoadi16CVTf32Pat<dag addrmode, dag INST>
4959 : Pat<(f32 (sint_to_fp (i32 (sextloadi16 addrmode)))),
4986 class SExtLoadi16CVTf64Pat<dag addrmode, dag INST>
4987 : Pat <(f64 (sint_to_fp (i32 (sextloadi16 addrmode)))),
5011 class SExtLoadi32CVTf64Pat<dag addrmode, dag INST>
5012 : Pat <(f64 (sint_to_fp (i32 (load addrmode)))),
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 6206 class SExtLoadi8CVTf32Pat<dag addrmode, dag INST>
6207 : Pat<(f32 (sint_to_fp (i32 (sextloadi8 addrmode)))),
6232 class SExtLoadi16CVTf32Pat<dag addrmode, dag INST>
6233 : Pat<(f32 (sint_to_fp (i32 (sextloadi16 addrmode)))),
6260 class SExtLoadi16CVTf64Pat<dag addrmode, dag INST>
6261 : Pat <(f64 (sint_to_fp (i32 (sextloadi16 addrmode)))),
6285 class SExtLoadi32CVTf64Pat<dag addrmode, dag INST>
6286 : Pat <(f64 (sint_to_fp (i32 (load addrmode)))),
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 5961 class SExtLoadi8CVTf32Pat<dag addrmode, dag INST>
5962 : Pat<(f32 (sint_to_fp (i32 (sextloadi8 addrmode)))),
5987 class SExtLoadi16CVTf32Pat<dag addrmode, dag INST>
5988 : Pat<(f32 (sint_to_fp (i32 (sextloadi16 addrmode)))),
6015 class SExtLoadi16CVTf64Pat<dag addrmode, dag INST>
6016 : Pat <(f64 (sint_to_fp (i32 (sextloadi16 addrmode)))),
6040 class SExtLoadi32CVTf64Pat<dag addrmode, dag INST>
6041 : Pat <(f64 (sint_to_fp (i32 (load addrmode)))),
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