Searched refs:adiw (Results 1 – 17 of 17) sorted by relevance
| /external/llvm-project/llvm/test/MC/AVR/ |
| D | inst-adiw.s | 7 adiw r26, 12
8 adiw r26, 63
10 adiw r28, 17
11 adiw r28, 0
13 adiw r30, 3
14 adiw r30, 63
15 adiw r24, 63
16 adiw r24, 0
17 adiw r30, 0
19 adiw r24, SYMBOL
[all …]
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| D | relocations.s | 16 adiw r24, FOO label
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| /external/llvm-project/llvm/test/CodeGen/AVR/ |
| D | alloca.ll | 5 ; Test taking an address of an alloca with a small offset (adiw)
13 ; CHECK: adiw r24, 17
15 ; CHECK: adiw {{.*}}, 39
32 ; CHECK: adiw r24, 17
52 ; CHECK: adiw r28, 57
69 ; materialized with adiw/sbiw but with a subi/sbci pair.
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| D | varargs.ll | 13 ; CHECK: adiw r24, 3
56 ; CHECK: adiw r30, 6
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| D | frame.ll | 23 ; CHECK: adiw r28, [[SIZE]]
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| D | interrupts.ll | 85 ; CHECK: adiw r28, 1
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| D | dynalloca.ll | 81 ; CHECK-NEXT: adiw r30, 8
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| D | add.ll | 35 ; CHECK: adiw r24, 63
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| D | directmem.ll | 119 ; CHECK: adiw r24, 1
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| /external/llvm-project/llvm/test/MC/AVR/out-of-range-fixups/ |
| D | adiw-pass.s | 4 adiw r24, foo+63 label
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| /external/llvm-project/lld/test/ELF/ |
| D | avr-reloc.s | 49 ;; 4e 96 adiw r24, 0x1e
55 adiw r24, b ; R_AVR_6_ADIW label
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| /external/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.td | 173 // 16-bit register class for the adiw/sbiw instructions.
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| D | AVRInstrInfo.td | 376 "adiw\t$rd, $k",
1789 // This pseudo gets expanded into a movw+adiw thus it clobbers SREG.
1916 // any add with imm instructions. Also take care of the adiw/sbiw instructions.
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.td | 190 // 16-bit register class for the adiw/sbiw instructions.
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| D | AVRInstrInfo.td | 418 "adiw\t$rd, $k",
1884 // This pseudo gets expanded into a movw+adiw thus it clobbers SREG.
2038 // any add with imm instructions. Also take care of the adiw/sbiw instructions.
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.td | 217 // 16-bit register class for the adiw/sbiw instructions.
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| D | AVRInstrInfo.td | 424 "adiw\t$rd, $k",
1900 // This pseudo gets expanded into a movw+adiw thus it clobbers SREG.
2054 // any add with imm instructions. Also take care of the adiw/sbiw instructions.
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