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Searched refs:align_u32 (Results 1 – 15 of 15) sorted by relevance

/external/llvm-project/clang/test/Sema/
Daarch64-sve-types.c23 …int align_u32[__alignof__(__SVUint32_t) == 16 ? 1 : -1]; // expected-error {{invalid application o… in f() local
/external/mesa3d/src/intel/tools/
Dintel_dump_gpu.c110 align_u32(uint32_t v, uint32_t a) in align_u32() function
257 offset = align_u32(offset, obj->alignment); in dump_execbuffer2()
259 offset = align_u32(offset + bo->size + 4095, 4096); in dump_execbuffer2()
Daub_write.c62 align_u32(uint32_t v, uint32_t a) in align_u32() function
704 dword_out(aub, align_u32(block_size, 4)); in aub_write_trace_block()
/external/mesa3d/src/vulkan/wsi/
Dwsi_common_drm.c411 align_u32(uint32_t v, uint32_t a) in align_u32() function
431 const uint32_t linear_stride = align_u32(pCreateInfo->imageExtent.width * cpp, in wsi_create_prime_image()
435 linear_size = align_u32(linear_size, 4096); in wsi_create_prime_image()
/external/igt-gpu-tools/tools/
Daubdump.c314 align_u32(uint32_t v, uint32_t a) in align_u32() function
674 dword_out(align_u32(block_size, 4)); in aub_write_trace_block()
967 offset = align_u32(offset, obj->alignment); in dump_execbuffer2()
972 offset = align_u32(offset + bo->size + 4095, 4096); in dump_execbuffer2()
/external/mesa3d/src/intel/vulkan/
Danv_allocator.c229 uint32_t used = align_u32(table->state.next * ANV_STATE_ENTRY_SIZE, in anv_state_table_grow()
634 uint32_t back_used = align_u32(pool->back_state.next, PAGE_SIZE); in anv_block_pool_grow()
635 uint32_t front_used = align_u32(pool->state.next, PAGE_SIZE); in anv_block_pool_grow()
1234 uint32_t offset = align_u32(stream->next, alignment); in anv_state_stream_alloc()
Danv_image.c139 surf->offset = align_u32(image->planes[plane].size, in add_surface()
143 surf->offset = align_u32(image->size, surf->isl.alignment_B); in add_surface()
Danv_batch_chain.c731 uint32_t bt_size = align_u32(entries * 4, 32); in anv_cmd_buffer_alloc_binding_table()
Danv_descriptor_set.c529 descriptor_buffer_size = align_u32(descriptor_buffer_size, 32); in anv_CreateDescriptorSetLayout()
DgenX_cmd_buffer.c1532 const uint32_t ss_stride = align_u32(isl_dev->ss.size, isl_dev->ss.align); in genX()
2783 range = align_u32(range, ANV_UBO_ALIGNMENT); in emit_binding_table()
3120 bound_range = align_u32(bound_range, ANV_UBO_ALIGNMENT); in get_push_range_bound_size()
Danv_queue.c805 uint32_t size = align_u32(batch->next - batch->start, 8); in anv_queue_submit_simple_batch()
Danv_private.h259 align_u32(uint32_t v, uint32_t a) in align_u32() function
Danv_device.c2976 .offset = align_u32( in anv_CreateDevice()
/external/mesa3d/src/amd/vulkan/
Dradv_descriptor_set.c548 layout_size = align_u32(layout_size, 32); in radv_descriptor_set_create()
Dradv_private.h102 align_u32(uint32_t v, uint32_t a) in align_u32() function