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Searched refs:analyzeCompare (Results 1 – 25 of 55) sorted by relevance

123

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CondBrFolding.cpp122 static bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
435 bool X86CondBrFolding::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, in analyzeCompare() function in X86CondBrFolding
526 if (analyzeCompare(*I, SrcReg, CmpValue)) { in analyzeMBB()
DX86InstrInfo.h472 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.h94 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
DLanaiInstrInfo.cpp179 bool LanaiInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, in analyzeCompare() function in LanaiInstrInfo
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.h97 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm-project/llvm/lib/Target/Lanai/
DLanaiInstrInfo.h98 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h171 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h249 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h165 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h222 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h236 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h250 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
DHexagonHardwareLoops.cpp454 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
624 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
1423 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h208 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h351 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h271 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
DHexagonHardwareLoops.cpp473 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
1461 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h221 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
/external/llvm/lib/Target/X86/
DX86InstrInfo.h503 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h253 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h272 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
DHexagonHardwareLoops.cpp473 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
1461 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.h508 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h501 bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h289 bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,

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