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/external/skia/tests/sksl/intrinsics/
DInverse.metal19 float b01 = a00*a12 - a02*a10;
30 float det = b00*b11 - b01*b10 + b02*b09 + b03*b08 - b04*b07 + b05*b06;
37 a32*b02 - a30*b05 - a33*b01,
38 a20*b05 - a22*b02 + a23*b01,
45 a31*b01 - a30*b03 - a32*b00,
46 a20*b03 - a21*b01 + a22*b00) * (1/det);
DDeterminant.glsl2 …b01 = a00 * a12 - a02 * a10; float b02 = a00 * a13 - a03 * a10; float b03 = a01 * a12 - a02 …
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td35 def : AT<"S1E1R", 0b01, 0b000, 0b0111, 0b1000, 0b000>;
36 def : AT<"S1E2R", 0b01, 0b100, 0b0111, 0b1000, 0b000>;
37 def : AT<"S1E3R", 0b01, 0b110, 0b0111, 0b1000, 0b000>;
38 def : AT<"S1E1W", 0b01, 0b000, 0b0111, 0b1000, 0b001>;
39 def : AT<"S1E2W", 0b01, 0b100, 0b0111, 0b1000, 0b001>;
40 def : AT<"S1E3W", 0b01, 0b110, 0b0111, 0b1000, 0b001>;
41 def : AT<"S1E0R", 0b01, 0b000, 0b0111, 0b1000, 0b010>;
42 def : AT<"S1E0W", 0b01, 0b000, 0b0111, 0b1000, 0b011>;
43 def : AT<"S12E1R", 0b01, 0b100, 0b0111, 0b1000, 0b100>;
44 def : AT<"S12E1W", 0b01, 0b100, 0b0111, 0b1000, 0b101>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td95 defm ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr", or>;
133 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon", xor>;
138 defm UMAX_ZI : sve_int_arith_imm1_unsigned<0b01, "umax", umax>;
220 defm FMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b01, "fmls", int_aarch64_sve_fmls>;
225 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb", int_aarch64_sve_fmsb>;
281 defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi", AArch64sunpkhi>;
295 def BRKPB_PPzPP : sve_int_brkp<0b01, "brkpb">;
361 defm LD1RB_H_IMM : sve_mem_ld_dup<0b00, 0b01, "ld1rb", Z_h, ZPR16, uimm6s1>;
364 defm LD1RSW_IMM : sve_mem_ld_dup<0b01, 0b00, "ld1rsw", Z_d, ZPR64, uimm6s4>;
365 defm LD1RH_IMM : sve_mem_ld_dup<0b01, 0b01, "ld1rh", Z_h, ZPR16, uimm6s2>;
[all …]
DSVEInstrFormats.td281 def _H : sve_int_ptrue<0b01, opc, asm, PPR16, nxv8i1, op>;
444 def _B : sve_int_pfirst_next<0b01, opc, asm, PPR8>;
451 def _H : sve_int_pfirst_next<0b01, opc, asm, PPR16>;
492 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64as32>;
520 def _H : sve_int_count_r<0b01, opc, asm, GPR32z, PPR16, GPR32z>;
537 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64z>;
575 def _H : sve_int_count_v<0b01, opc, asm, ZPR16, PPR16>;
614 def _H : sve_int_pcount_pred<0b01, opc, asm, PPR16>;
824 def _H : sve_int_perm_dup_r<0b01, asm, ZPR16, nxv8i16, GPR32sp, op>;
921 def _H : sve_int_perm_tbl<0b01, 0b10, asm, ZPR16, Z_h>;
[all …]
/external/tcpdump/tests/
Disis_sysid_asan.out6 0x0000: ff10 8e12 0001 1b01 0000 6b00 fbcf f90f
8 0x0020: 0281 0083 1b01 0010 019d e000 fed0 f90f
10 0x0040: 0c2a 2205 831b 011c 0010 0000 0583 1b01
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td244 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
258 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
269 : RVInst16CA<funct6, funct2, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2),
363 def C_NOP : RVInst16CI<0b000, 0b01, (outs), (ins), "c.nop", "">,
370 def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
379 def C_ADDI_NOP : RVInst16CI<0b000, 0b01, (outs GPRX0:$rd_wb),
391 def C_JAL : RVInst16CJ<0b001, 0b01, (outs), (ins simm12_lsb0:$offset),
396 def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb),
405 def C_LI : RVInst16CI<0b010, 0b01, (outs GPRNoX0:$rd), (ins simm6:$imm),
412 def C_ADDI16SP : RVInst16CI<0b011, 0b01, (outs SP:$rd_wb),
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td248 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
262 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
273 : RVInst16CA<funct6, funct2, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2),
367 def C_NOP : RVInst16CI<0b000, 0b01, (outs), (ins), "c.nop", "">,
374 def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
383 def C_ADDI_NOP : RVInst16CI<0b000, 0b01, (outs GPRX0:$rd_wb),
395 def C_JAL : RVInst16CJ<0b001, 0b01, (outs), (ins simm12_lsb0:$offset),
400 def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb),
409 def C_LI : RVInst16CI<0b010, 0b01, (outs GPRNoX0:$rd), (ins simm6:$imm),
416 def C_ADDI16SP : RVInst16CI<0b011, 0b01, (outs SP:$rd_wb),
[all …]
/external/llvm-project/llvm/unittests/TableGen/
DAutomata.td22 // Token SK_a sets bit 0b01.
23 def : SimpleTransition<0b01, SK_a>;
47 def : TupleTransition<0b01, SK_a, SK_b, "yeet">;
66 // Symbols a and b can transition to 0b01 or 0b11 (sets bit 0).
67 def : NfaTransition<0b01, SK_a>;
68 def : NfaTransition<0b01, SK_b>;
/external/skia/src/core/
DSkMatrix44.cpp465 double b01 = a00 * a12 - a02 * a10; in determinant() local
478 return b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in determinant()
580 double b01 = a00 * a12 - a02 * a10; in invert() local
590 double det = b00 * b11 - b01 * b10 + b03 * b08; in invert()
601 b01 *= invdet; in invert()
616 inverse->fMat[1][2] = SkDoubleToScalar(-b01); in invert()
624 inverse->fMat[3][2] = SkDoubleToScalar(a31 * b01 - a30 * b03 - a32 * b00); in invert()
638 double b01 = a00 * a12 - a02 * a10; in invert() local
651 double det = b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in invert()
662 b01 *= invdet; in invert()
[all …]
DSkM44.cpp266 double b01 = a00 * a12 - a02 * a10; in invert() local
279 double det = b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in invert()
287 b01 *= invdet; in invert()
306 SkDoubleToScalar(a32 * b02 - a30 * b05 - a33 * b01), in invert()
307 SkDoubleToScalar(a20 * b05 - a22 * b02 + a23 * b01), in invert()
314 SkDoubleToScalar(a31 * b01 - a30 * b03 - a32 * b00), in invert()
315 SkDoubleToScalar(a20 * b03 - a21 * b01 + a22 * b00), in invert()
/external/skqp/src/core/
DSkMatrix44.cpp456 double b01 = a00 * a12 - a02 * a10; in determinant() local
469 return b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in determinant()
571 double b01 = a00 * a12 - a02 * a10; in invert() local
581 double det = b00 * b11 - b01 * b10 + b03 * b08; in invert()
592 b01 *= invdet; in invert()
607 inverse->fMat[1][2] = SkDoubleToMScalar(-b01); in invert()
615 inverse->fMat[3][2] = SkDoubleToMScalar(a31 * b01 - a30 * b03 - a32 * b00); in invert()
629 double b01 = a00 * a12 - a02 * a10; in invert() local
642 double det = b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06; in invert()
653 b01 *= invdet; in invert()
[all …]
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td398 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
403 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
408 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
413 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
418 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
423 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
432 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
437 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
442 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
447 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td412 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
417 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
422 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
427 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
432 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
437 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
446 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
451 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
456 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
461 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td412 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
417 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
422 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
427 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
432 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
437 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
446 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
451 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
456 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
461 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
[all …]
/external/skia/modules/canvaskit/
Dmatrix.js339 var b01 = a00 * a12 - a02 * a10;
352 var det = b00 * b11 - b01 * b10 + b02 * b09 + b03 * b08 - b04 * b07 + b05 * b06;
362 b01 *= invdet;
387 a32 * b02 - a30 * b05 - a33 * b01,
389 a31 * b01 - a30 * b03 - a32 * b00,
392 a20 * b05 - a22 * b02 + a23 * b01,
394 a20 * b03 - a21 * b01 + a22 * b00,
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td287 defm ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr", or>;
334 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon", xor>;
339 defm UMAX_ZI : sve_int_arith_imm1_unsigned<0b01, "umax", AArch64umax_p>;
458 defm FMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b01, "fmls", int_aarch64_sve_fmls>;
463 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb", int_aarch64_sve_fmsb>;
609 defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi", AArch64sunpkhi>;
623 defm BRKPB_PPzPP : sve_int_brkp<0b01, "brkpb", int_aarch64_sve_brkpb_z>;
701 defm LD1RB_H_IMM : sve_mem_ld_dup<0b00, 0b01, "ld1rb", Z_h, ZPR16, uimm6s1>;
704 defm LD1RSW_IMM : sve_mem_ld_dup<0b01, 0b00, "ld1rsw", Z_d, ZPR64, uimm6s4>;
705 defm LD1RH_IMM : sve_mem_ld_dup<0b01, 0b01, "ld1rh", Z_h, ZPR16, uimm6s2>;
[all …]
DSVEInstrFormats.td288 def _H : sve_int_ptrue<0b01, opc, asm, PPR16, nxv8i1, op>;
560 def _B : sve_int_pfirst_next<0b01, opc, asm, PPR8>;
567 def _H : sve_int_pfirst_next<0b01, opc, asm, PPR16>;
608 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64as32>;
636 def _H : sve_int_count_r<0b01, opc, asm, GPR32z, PPR16, GPR32z>;
653 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64z>;
691 def _H : sve_int_count_v<0b01, opc, asm, ZPR16, PPR16>;
730 def _H : sve_int_pcount_pred<0b01, opc, asm, PPR16>;
940 def _H : sve_int_perm_dup_r<0b01, asm, ZPR16, nxv8i16, GPR32sp, op>;
1037 def _H : sve_int_perm_tbl<0b01, 0b10, asm, ZPR16, Z_h>;
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td101 def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
105 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
113 def VLDRH : AHI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5fp16:$addr),
148 let Inst{24-23} = 0b01; // Increment After
157 let Inst{24-23} = 0b01; // Increment After
176 let Inst{24-23} = 0b01; // Increment After
189 let Inst{24-23} = 0b01; // Increment After
302 let Inst{24-23} = 0b01; // Increment After
309 let Inst{24-23} = 0b01; // Increment After
465 defm VSELVS : vsel_inst<"vs", 0b01, 6>;
[all …]
DARMInstrNEON.td3239 def v4i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 0, op4,
3253 def v4f16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 0, op4,
3266 def v8i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 1, op4,
3280 def v8f16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 1, op4,
3299 def v4i16 : N2VDInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4,
3307 def v8i16 : N2VQInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4,
3323 def v4i16 : N2VN<op24_23, op21_20, 0b01, op17_16, op11_7, op6, op4,
3340 def v4i16 : N2VNInt<op24_23, op21_20, 0b01, op17_16, op11_7, op6, op4,
3355 def v4i32 : N2VL<op24_23, 0b01, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3374 def v4i16 : N3VD<op24, op23, 0b01, op11_8, op4, itinD16,
[all …]
/external/clang/test/CodeGenCXX/
Dbitfield.cpp14 unsigned b01 : 2; member
52 return s->b01; in read01()
/external/llvm-project/clang/test/CodeGenCXX/
Dbitfield.cpp14 unsigned b01 : 2; member
52 return s->b01; in read01()
/external/llvm-project/llvm/test/Transforms/PhaseOrdering/X86/
Daddsub.ll55 %b01 = extractelement <2 x float> %b0, i32 1
56 %add4 = fadd float %a01, %b01
86 %b01 = extractelement <2 x float> %b0, i32 1
87 %add4 = fadd float %a01, %b01
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrMVE.td330 def MVE_v8i16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, 0b01, "i", ?>;
338 def MVE_v8s16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, 0b01, "s", 0b0>;
342 def MVE_v8u16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, 0b01, "u", 0b1>;
347 def MVE_v8f16 : MVEVectorVTInfo<v8f16, v4f32, v8i1, 0b01, "f", ?>;
445 def MVE_URSHR : MVE_ScalarShiftSRegImm<"urshr", 0b01>;
546 def MVE_LSRL : MVE_ScalarShiftDRegImm<"lsrl", 0b01, ?, [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
556 def MVE_URSHRL : MVE_ScalarShiftDRegImm<"urshrl", 0b01, 0b1>;
635 let Inst{17-16} = 0b01;
655 defm MVE_VADDVs16 : MVE_VADDV_A<"s16", 0b0, 0b01>;
658 defm MVE_VADDVu16 : MVE_VADDV_A<"u16", 0b1, 0b01>;
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td154 def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
159 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
169 def VLDRH : AHI5<0b1101, 0b01, (outs HPR:$Sd), (ins addrmode5fp16:$addr),
234 let Inst{24-23} = 0b01; // Increment After
243 let Inst{24-23} = 0b01; // Increment After
262 let Inst{24-23} = 0b01; // Increment After
275 let Inst{24-23} = 0b01; // Increment After
369 let Inst{24-23} = 0b01; // Increment After
376 let Inst{24-23} = 0b01; // Increment After
548 defm VSELVS : vsel_inst<"vs", 0b01, 6>;
[all …]

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