Home
last modified time | relevance | path

Searched refs:backedges (Results 1 – 25 of 26) sorted by relevance

12

/external/llvm/test/Transforms/LoopSimplify/
Dindirectbr-backedge.ll3 ; LoopSimplify shouldn't split loop backedges that use indirectbr.
/external/llvm-project/llvm/test/Transforms/LoopSimplify/
Dindirectbr-backedge.ll3 ; LoopSimplify shouldn't split loop backedges that use indirectbr.
/external/llvm/test/Analysis/ScalarEvolution/
Dunsimplified-loop.ll3 ; This loop has no preheader, multiple backedges, etc., but ScalarEvolution
Dguards.ll4 ; conditions gaurding loop entries and backedges. This isn't intended
/external/llvm-project/llvm/test/Analysis/ScalarEvolution/
Dunsimplified-loop.ll4 ; This loop has no preheader, multiple backedges, etc., but ScalarEvolution
Dguards.ll4 ; conditions gaurding loop entries and backedges. This isn't intended
/external/llvm-project/mlir/lib/Transforms/
DBufferDeallocation.cpp509 Backedges backedges(getFunction()); in runOnFunction() local
510 if (backedges.size()) { in runOnFunction()
/external/llvm-project/llvm/test/DebugInfo/MIR/X86/
Dlivedebugvalues_loop_two_backedge_clobbered.mir5 ; their locations and have two backedges.
Dlivedebugvalues_loop_two_backedge.mir5 ; backedges and beyond.
/external/llvm-project/llvm/test/Transforms/StructurizeCFG/AMDGPU/
Dloop-subregion-misordered.ll5 ; list to get the order. The only problem with it is that sometimes backedges
6 ; for outer loops will be visited before backedges for inner loops. To solve this problem,
/external/llvm-project/mlir/test/Transforms/
Dsccp-structured.mlir91 /// Check that arguments go to overdefined when loop backedges produce a
Dsccp.mlir161 /// Check that arguments go to overdefined when loop backedges produce a
Dpromote-buffers-to-stack.mlir503 // that are passed via the backedges. The alloc is converted to an AllocaOp.
Dbuffer-deallocation.mlir912 // that are passed via the backedges.
/external/llvm-project/llvm/test/Analysis/BlockFrequencyInfo/
Dbasic.ll12 ; Loop backedges are weighted and thus their bodies have a greater frequency.
Dirreducible.ll50 ; that are targets of a backedge within it (excluding backedges within true
54 ; intercepts all the edges to the headers. All backedges and entries point to
/external/llvm/test/Analysis/BlockFrequencyInfo/
Dbasic.ll12 ; Loop backedges are weighted and thus their bodies have a greater frequency.
Dirreducible.ll50 ; that are targets of a backedge within it (excluding backedges within true
54 ; intercepts all the edges to the headers. All backedges and entries point to
/external/llvm-project/llvm/docs/
DBlockFrequencyTerminology.rst67 bottom-up, ignoring backedges; i.e., as a DAG. After each loop is processed,
DLoopTerminology.rst239 times any of the backedges is taken before the loop. It is one less than
/external/llvm/docs/
DBlockFrequencyTerminology.rst67 bottom-up, ignoring backedges; i.e., as a DAG. After each loop is processed,
DStatepoints.rst752 loop backedges locations. Extending this to work with return polls would be
/external/tensorflow/tensorflow/compiler/jit/
Ddeadness_analysis.cc986 std::vector<string> backedges; in CreateMultipleNextIterationInputsError() local
989 backedges.push_back(absl::StrCat(" ", SummarizeNode(*backedge->src()))); in CreateMultipleNextIterationInputsError()
994 FormatNodeForError(*merge), ": \n", absl::StrJoin(backedges, "\n"), in CreateMultipleNextIterationInputsError()
/external/llvm-project/llvm/test/CodeGen/WebAssembly/
Dcfg-stackify.ll13 ; Test that loops are made contiguous, even in the presence of split backedges.
505 ; Test a case where there are multiple backedges and multiple loop exits
/external/llvm/test/CodeGen/WebAssembly/
Dcfg-stackify.ll14 ; Test that loops are made contiguous, even in the presence of split backedges.
691 ; Test a case where there are multiple backedges and multiple loop exits

12