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Searched refs:bankHeight (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/amd/addrlib/src/r800/
Degbaddrlib.cpp779 if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) in HwlReduceBankWidthHeight()
797 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
807 ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); in HwlReduceBankWidthHeight()
827 if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
829 while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
831 pTileInfo->bankHeight >>= 1; in HwlReduceBankWidthHeight()
833 if (pTileInfo->bankHeight < bankHeightAlign) in HwlReduceBankWidthHeight()
835 pTileInfo->bankHeight = bankHeightAlign; in HwlReduceBankWidthHeight()
840 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
851 tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); in HwlReduceBankWidthHeight()
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Dciaddrlib.cpp614 pInfo->bankHeight = 1; in HwlSetupTileCfg()
968 tileInfo.bankHeight; in HwlOptimizeTileMode()
1492 tileInfo.bankWidth * tileInfo.bankHeight; in HwlSetupTileInfo()
1503 tileInfo.bankWidth * tileInfo.bankHeight; in HwlSetupTileInfo()
1648 pCfg->info.bankHeight = 1; in ReadGbTileMode()
1741 pCfg->bankHeight = 1 << gbTileMode.f.alt_bank_height; in ReadGbMacroTileCfg()
1747 pCfg->bankHeight = 1 << gbTileMode.f.bank_height; in ReadGbMacroTileCfg()
2200 m_macroTileTable[i].bankWidth * m_macroTileTable[i].bankHeight; in HwlComputeMaxBaseAlignments()
2270 (m_macroTileTable[stencilMacroIndex].bankHeight == in DepthStencilTileCfgMatch()
2271 m_macroTileTable[pOut->macroModeIndex].bankHeight) && in DepthStencilTileCfgMatch()
Dsiaddrlib.cpp228 UINT_32 bankYStart = 3 + Log2(pTileInfo->bankHeight); in ComputeBankEquation()
2536 *pY += yBit * pTileInfo->bankHeight * MicroTileHeight; in HwlComputeSurfaceCoord2DFromBankPipe()
3022 pInfo->bankHeight = 1; in HwlSetupTileCfg()
3082 pCfg->info.bankHeight = 1 << gbTileMode.f.bank_height; in ReadGbTileMode()
3529 m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight; in HwlComputeMaxBaseAlignments()
3658 key.fields.bankHeight = tileConfig.info.bankHeight; in InitEquationTable()
3722 MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / in InitEquationTable()
3801 MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / in InitEquationTable()
/external/mesa3d/src/amd/addrlib/inc/
Daddrinterface.h151 UINT_32 bankHeight : 4; ///< Bank height member
455 UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank member
/external/mesa3d/src/amd/common/
Dac_surface.c733 surf->u.legacy.bankh = csio->pTileInfo->bankHeight; in gfx6_surface_settings()
988 AddrTileInfoIn.bankHeight = surf->u.legacy.bankh; in gfx6_compute_surface()
1148 surf->u.legacy.fmask.bankh = fout.pTileInfo->bankHeight; in gfx6_compute_surface()