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Searched refs:bankh (Results 1 – 18 of 18) sorted by relevance

/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c152 surf_drm->bankh = surf_ws->u.legacy.bankh; in surf_winsys_to_drm()
194 surf_ws->u.legacy.bankh = surf_drm->bankh; in surf_drm_to_winsys()
416 surf_ws->u.legacy.fmask.bankh = fmask.u.legacy.bankh; in radeon_winsys_surface_init()
Dradeon_drm_bo.c902 …surf->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANK… in radeon_bo_get_metadata()
925 …md->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_… in radeon_bo_get_metadata()
953 args.tiling_flags |= (surf->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) << in radeon_bo_set_metadata()
978 args.tiling_flags |= (md->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) << in radeon_bo_set_metadata()
/external/libdrm/radeon/
Dradeon_surface.c676 mtileh = (tileh * surf->bankh * surf_man->hw_info.num_banks) / surf->mtilea; in eg_surface_init_2d()
770 switch (surf->bankh) { in eg_surface_sanity()
780 if ((tileb * surf->bankh * surf->bankw) < surf_man->hw_info.group_bytes) { in eg_surface_sanity()
920 surf->bankh = 1; in eg_surface_best()
923 for (; surf->bankh <= 8; surf->bankh *= 2) { in eg_surface_best()
924 if ((tileb * surf->bankh * surf->bankw) >= surf_man->hw_info.group_bytes) { in eg_surface_best()
1001 surf->bankh = 4; in eg_surface_best()
1005 surf->bankh = 2; in eg_surface_best()
1008 surf->bankh = 1; in eg_surface_best()
1012 for (; surf->bankh <= 8; surf->bankh *= 2) { in eg_surface_best()
[all …]
Dradeon_surface.h131 uint32_t bankh; member
/external/mesa3d/src/gallium/drivers/r600/
Dradeon_video.c162 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh; in rvid_join_surfaces()
178 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh; in rvid_join_surfaces()
Dr600_texture.c285 metadata->u.legacy.bankh = surface->u.legacy.bankh; in r600_texture_init_metadata()
301 surf->u.legacy.bankh = metadata->u.legacy.bankh; in r600_surface_import_metadata()
613 fmask.u.legacy.bankh = rtex->surface.u.legacy.bankh; in r600_texture_get_fmask_info()
618 fmask.u.legacy.bankh = 4; in r600_texture_get_fmask_info()
654 out->bank_height = fmask.u.legacy.bankh; in r600_texture_get_fmask_info()
844 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in r600_print_texture_info()
Devergreen_state.c731 unsigned macro_aspect, tile_split, bankh, bankw, nbanks, fmask_bankh; in evergreen_fill_tex_resource_words() local
811 bankh = tmp->surface.u.legacy.bankh; in evergreen_fill_tex_resource_words()
815 bankh = eg_bank_wh(bankh); in evergreen_fill_tex_resource_words()
899 S_03001C_BANK_HEIGHT(bankh) | in evergreen_fill_tex_resource_words()
1121 unsigned non_disp_tiling, macro_aspect, tile_split, bankh, bankw, fmask_bankh, nbanks; in evergreen_set_color_surface_common() local
1160 bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1164 fmask_bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1168 bankh = eg_bank_wh(bankh); in evergreen_set_color_surface_common()
1185 S_028C74_BANK_HEIGHT(bankh) | in evergreen_set_color_surface_common()
1357 unsigned macro_aspect, tile_split, bankh, bankw, nbanks; in evergreen_init_depth_surface() local
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Dradeon_uvd.c1242 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in ruvd_set_dt_surfaces()
1247 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in ruvd_set_dt_surfaces()
/external/mesa3d/src/amd/common/
Dac_surface.h98 uint8_t bankh; /* max 8 */ member
105 unsigned bankh : 4; /* max 8 */ member
Dac_surface.c733 surf->u.legacy.bankh = csio->pTileInfo->bankHeight; in gfx6_surface_settings()
983 surf->u.legacy.bankh && surf->u.legacy.mtilea && surf->u.legacy.tile_split) { in gfx6_compute_surface()
988 AddrTileInfoIn.bankHeight = surf->u.legacy.bankh; in gfx6_compute_surface()
1148 surf->u.legacy.fmask.bankh = fout.pTileInfo->bankHeight; in gfx6_compute_surface()
2239 surf->u.legacy.bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in ac_surface_set_bo_metadata()
2292 *tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(surf->u.legacy.bankh)); in ac_surface_get_bo_metadata()
/external/mesa3d/src/amd/vulkan/
Dradv_radeon_winsys.h138 unsigned bankh; member
Dradv_image.c335 surface->u.legacy.bankh = md->u.legacy.bankh; in radv_patch_surface_from_metadata()
1239 metadata->u.legacy.bankh = surface->u.legacy.bankh; in radv_init_metadata()
Dradv_device.c6878 unsigned fmask_bankh = util_logbase2(surf->u.legacy.fmask.bankh); in radv_initialise_color_surface()
6909 unsigned bankh = util_logbase2(surf->u.legacy.bankh); in radv_initialise_color_surface() local
6910 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in radv_initialise_color_surface()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_winsys.h222 unsigned bankh; member
Dradeon_uvd.c1476 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in si_uvd_set_dt_surfaces()
1481 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in si_uvd_set_dt_surfaces()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_bo.c802 tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->u.legacy.bankh)); in radv_amdgpu_winsys_bo_set_metadata()
848 md->u.legacy.bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in radv_amdgpu_winsys_bo_get_metadata()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c2300 unsigned fmask_bankh = util_logbase2(tex->surface.u.legacy.fmask.bankh); in si_initialize_color_surface()
2349 unsigned bankh = util_logbase2(tex->surface.u.legacy.bankh); in si_initialize_color_surface() local
2350 color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in si_initialize_color_surface()
Dsi_texture.c894 tex->surface.u.legacy.bankh, tex->surface.u.legacy.num_banks, in si_print_texture_info()
904 tex->surface.u.legacy.fmask.pitch_in_pixels, tex->surface.u.legacy.fmask.bankh, in si_print_texture_info()