/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | aarch64-ldst-modified-baseReg.mir | 14 # CHECK-LABEL: name: ldr-modified-baseReg-no-ldp1 21 name: ldr-modified-baseReg-no-ldp1 33 # CHECK-LABEL: name: str-modified-baseReg-no-stp1 40 name: str-modified-baseReg-no-stp1 52 # CHECK-LABEL: name: ldr-modified-baseReg-no-ldp2 59 name: ldr-modified-baseReg-no-ldp2 71 # CHECK-LABEL: name: ldr-modified-baseReg-no-ldp3 78 name: ldr-modified-baseReg-no-ldp3
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 325 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex() local 326 mcInst.addOperand(baseReg); in translateSrcIndex() 350 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex() local 351 mcInst.addOperand(baseReg); in translateDstIndex() 721 MCOperand baseReg; in translateRMMemory() local 736 baseReg = MCOperand::createReg(X86::x); break; in translateRMMemory() 741 baseReg = MCOperand::createReg(0); in translateRMMemory() 817 baseReg = MCOperand::createReg(X86::RIP); // Section 2.2.1.6 in translateRMMemory() 820 baseReg = MCOperand::createReg(0); in translateRMMemory() 825 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory() [all …]
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/external/llvm-project/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 1844 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex() local 1845 mcInst.addOperand(baseReg); in translateSrcIndex() 1869 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex() local 1870 mcInst.addOperand(baseReg); in translateDstIndex() 2040 MCOperand baseReg; in translateRMMemory() local 2055 baseReg = MCOperand::createReg(X86::x); break; in translateRMMemory() 2060 baseReg = MCOperand::createReg(X86::NoRegister); in translateRMMemory() 2113 baseReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIP : in translateRMMemory() 2117 baseReg = MCOperand::createReg(X86::NoRegister); in translateRMMemory() 2122 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 1830 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex() local 1831 mcInst.addOperand(baseReg); in translateSrcIndex() 1855 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex() local 1856 mcInst.addOperand(baseReg); in translateDstIndex() 2024 MCOperand baseReg; in translateRMMemory() local 2039 baseReg = MCOperand::createReg(X86::x); break; in translateRMMemory() 2044 baseReg = MCOperand::createReg(X86::NoRegister); in translateRMMemory() 2096 baseReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIP : in translateRMMemory() 2100 baseReg = MCOperand::createReg(X86::NoRegister); in translateRMMemory() 2105 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory() [all …]
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/external/llvm-project/llvm/include/llvm/MC/MCParser/ |
D | MCTargetAsmParser.h | 75 IntelExpr(StringRef baseReg, StringRef indexReg, unsigned scale, in IntelExpr() 77 : NeedBracs(needBracs), Imm(imm), BaseReg(baseReg), IndexReg(indexReg), in IntelExpr()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/MCParser/ |
D | MCTargetAsmParser.h | 76 IntelExpr(StringRef baseReg, StringRef indexReg, unsigned scale, in IntelExpr() 78 : NeedBracs(needBracs), Imm(imm), BaseReg(baseReg), IndexReg(indexReg), in IntelExpr()
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/external/boringssl/src/util/fipstools/delocate/ |
D | delocate.go | 1003 baseReg := destReg 1004 if baseReg == "0" { 1007 baseReg = "3" 1010 d.output.WriteString("\tstd " + baseReg + ", -8(1)\n") 1011 d.output.WriteString("\tmr " + baseReg + ", " + destReg + "\n") 1013 d.output.WriteString("\tld " + baseReg + ", -8(1)\n") 1019 d.output.WriteString("\t" + origInstructionName + " " + destReg + ", 0(" + baseReg + ")\n")
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
D | MemRegion.h | 1254 getCXXBaseObjectRegionWithSuper(const CXXBaseObjectRegion *baseReg, in getCXXBaseObjectRegionWithSuper() argument 1256 return getCXXBaseObjectRegion(baseReg->getDecl(), superRegion, in getCXXBaseObjectRegionWithSuper() 1257 baseReg->isVirtual()); in getCXXBaseObjectRegionWithSuper()
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/external/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
D | MemRegion.h | 1447 getCXXBaseObjectRegionWithSuper(const CXXBaseObjectRegion *baseReg, in getCXXBaseObjectRegionWithSuper() argument 1449 return getCXXBaseObjectRegion(baseReg->getDecl(), superRegion, in getCXXBaseObjectRegionWithSuper() 1450 baseReg->isVirtual()); in getCXXBaseObjectRegionWithSuper()
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/external/icu/android_icu4j/src/main/java/android/icu/util/ |
D | Calendar.java | 3578 String baseReg = baseLoc.getCountry(); in getPatternData() local 3579 if ((baseReg.length() > 0 && !baseReg.equals(validLoc.getCountry())) in getPatternData()
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/external/icu/icu4j/main/classes/core/src/com/ibm/icu/util/ |
D | Calendar.java | 3685 String baseReg = baseLoc.getCountry(); in getPatternData() local 3686 if ((baseReg.length() > 0 && !baseReg.equals(validLoc.getCountry())) in getPatternData()
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/external/icu/icu4c/source/i18n/ |
D | smpdtfmt.cpp | 740 const char* baseReg = baseLoc.getCountry(); // empty string if no region in construct() local 741 … if ((baseReg[0]!=0 && uprv_strncmp(baseReg,validLoc.getCountry(),ULOC_COUNTRY_CAPACITY)!=0) in construct()
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