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/external/llvm/test/CodeGen/X86/
Dswitch.ll9 i32 3, label %bb0
14 bb0: tail call void @g(i32 0) br label %return
37 i32 3, label %bb0
42 bb0: tail call void @g(i32 0) br label %return
56 i32 3, label %bb0
61 bb0: tail call void @g(i32 0) br label %return
78 i32 0, label %bb0
79 i32 1, label %bb0
80 i32 2, label %bb0
81 i32 3, label %bb0
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dswitch.ll9 i32 3, label %bb0
14 bb0: tail call void @g(i32 0) br label %return
37 i32 3, label %bb0
42 bb0: tail call void @g(i32 0) br label %return
56 i32 3, label %bb0
61 bb0: tail call void @g(i32 0) br label %return
78 i32 0, label %bb0
79 i32 1, label %bb0
80 i32 2, label %bb0
81 i32 3, label %bb0
[all …]
Dand-sink.ll9 ; Test that 'and' is sunk into bb0.
15 ; CHECK-NEXT: # %bb.1: # %bb0
30 br i1 %c, label %bb0, label %bb2
31 bb0:
32 ; CHECK-CGP-LABEL: bb0:
53 ; CHECK-NEXT: # %bb.1: # %bb0.preheader
57 ; CHECK-NEXT: .LBB1_2: # %bb0
78 br i1 %c, label %bb0, label %bb3
79 bb0:
80 ; CHECK-CGP-LABEL: bb0:
[all …]
/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/X86/
Dwiden_switch.ll12 i16 1, label %sw.bb0
16 sw.bb0:
26 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
32 ; X86-NEXT: i16 1, label %sw.bb0
42 i17 10, label %sw.bb0
46 sw.bb0:
56 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
62 ; X86-NEXT: i32 10, label %sw.bb0
68 ; DEBUG-NEXT: label %sw.bb0
80 i2 1, label %sw.bb0
[all …]
Dcomputedgoto.ll9 ; CHECK: @simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@s…
10 @simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@simple, %b…
12 ; CHECK: @multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@mul…
13 @multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@multi, %bb1)…
15 ; CHECK: @loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop,…
16 @loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop, %bb1)], …
18 ; CHECK: @nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nop…
19 @nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nophi, %bb1)…
21 ; CHECK: @noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* block…
22 @noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* blockaddress(@…
[all …]
/external/llvm/unittests/Transforms/Utils/
DLocal.cpp25 BasicBlock *bb0 = BasicBlock::Create(C); in TEST() local
28 builder.SetInsertPoint(bb0); in TEST()
30 BranchInst *br0 = builder.CreateCondBr(builder.getTrue(), bb0, bb1); in TEST()
33 BranchInst *br1 = builder.CreateBr(bb0); in TEST()
35 phi->addIncoming(phi, bb0); in TEST()
42 EXPECT_EQ(&bb0->front(), br0); in TEST()
45 builder.SetInsertPoint(bb0); in TEST()
50 builder.SetInsertPoint(bb0); in TEST()
56 bb0->dropAllReferences(); in TEST()
58 delete bb0; in TEST()
/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/AArch64/
Dwiden_switch.ll11 i16 1, label %sw.bb0
15 sw.bb0:
25 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
31 ; ARM64-NEXT: i32 1, label %sw.bb0
41 i17 10, label %sw.bb0
45 sw.bb0:
55 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
61 ; ARM64-NEXT: i32 10, label %sw.bb0
72 i2 1, label %sw.bb0
76 sw.bb0:
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dcgp-bitfield-extract.ll13 ; OPT: bb0:
42 br i1 undef, label %bb0, label %bb1
44 bb0:
55 %phi = phi i32 [ %val0, %bb0 ], [ %val1, %bb1 ]
64 ; OPT: bb0:
82 br i1 undef, label %bb0, label %bb1
84 bb0:
95 %phi = phi i32 [ %val0, %bb0 ], [ %val1, %bb1 ]
105 ; OPT: bb0:
134 br i1 undef, label %bb0, label %bb1
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dcgp-bitfield-extract.ll13 ; OPT: bb0:
41 br i1 undef, label %bb0, label %bb1
43 bb0:
54 %phi = phi i32 [ %val0, %bb0 ], [ %val1, %bb1 ]
63 ; OPT: bb0:
81 br i1 undef, label %bb0, label %bb1
83 bb0:
94 %phi = phi i32 [ %val0, %bb0 ], [ %val1, %bb1 ]
104 ; OPT: bb0:
138 br i1 undef, label %bb0, label %bb1
[all …]
/external/llvm-project/mlir/test/Dialect/
Dtraits.mlir7 ^bb0(%arg0: tensor<i32>, %arg1: tensor<i32>):
15 ^bb0(%arg0: tensor<4xi32>, %arg1: tensor<i32>):
24 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<3x1xi32>):
33 ^bb0(%arg0: tensor<8x1x6x1xi32>, %arg1: tensor<7x1x5xi32>):
42 ^bb0(%arg0: tensor<?x1x6x1xi32>, %arg1: tensor<7x1x5xi32>):
51 ^bb0(%arg0: tensor<8x1x?x1xi32>, %arg1: tensor<7x1x5xi32>):
60 ^bb0(%arg0: tensor<4xf32>, %arg1: tensor<4xf32>):
70 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<3x3xi32>):
80 ^bb0(%arg0: tensor<4x3x2xi32>, %arg1: tensor<3x1xi32>):
90 ^bb0(%arg0: tensor<8x1x6x1xi32>, %arg1: tensor<7x1x5xi32>):
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dand-sink.ll18 br i1 %c, label %bb0, label %bb2
19 bb0:
20 ; CHECK-CGP-LABEL: bb0:
48 br i1 %c, label %bb0, label %bb3
49 bb0:
50 ; CHECK-CGP-LABEL: bb0:
63 br i1 %cmp, label %bb2, label %bb0
81 br label %bb0
82 bb0:
83 ; CHECK-CGP-LABEL: bb0:
[all …]
/external/llvm-project/llvm/test/Analysis/BranchProbabilityInfo/
Dswitch.ll13 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
14 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
15 ;CHECK: edge entry -> bb0 probability is 0x26666666 / 0x80000000 = 30.00%
22 ;CHECK: edge bb0 -> return probability is 0x80000000 / 0x80000000 = 100.00% [HOT edge]
28 i32 0, label %bb0
29 i32 3, label %bb0
30 i32 6, label %bb0
39 bb0: ; preds = %entry, %entry, %entry
51 return: ; preds = %bb2, %bb1, %bb0, %entry
/external/llvm-project/polly/test/ScopDetect/
Dmultidim_indirect_access.ll17 ; CHECK: Valid Region for Scop: bb1 => bb0
23 br label %bb0
25 bb0:
32 bb1: ; preds = %bb7, %bb0
33 %i = phi i64 [ %i.next, %bb1 ], [ 1, %bb0 ]
34 %.0 = phi i32* [ %A, %bb0 ], [ %tmp12, %bb1 ]
42 br i1 %exitcond, label %bb1, label %bb0
/external/llvm/test/Transforms/GVN/
Dunreachable_block_infinite_loop.ll17 br label %bb0
22 br i1 undef, label %bb0, label %bb1
24 bb0:
32 br label %bb0
37 br i1 undef, label %bb0, label %bb1
39 bb0:
/external/llvm-project/llvm/test/Transforms/GVN/
Dunreachable_block_infinite_loop.ll17 br label %bb0
22 br i1 undef, label %bb0, label %bb1
24 bb0:
32 br label %bb0
37 br i1 undef, label %bb0, label %bb1
39 bb0:
/external/llvm-project/llvm/test/Transforms/NewGVN/
Dunreachable_block_infinite_loop.ll17 br label %bb0
22 br i1 undef, label %bb0, label %bb1
24 bb0:
32 br label %bb0
37 br i1 undef, label %bb0, label %bb1
39 bb0:
/external/llvm-project/llvm/test/Transforms/CodeGenPrepare/ARM/
Dtailcall-dup.ll14 bb0:
21 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
31 bb0:
38 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
48 bb0:
55 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
68 bb0:
75 %retval = phi i8* [ %tmp0, %bb0 ], [ %tmp1, %bb1 ]
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dwiden_switch.ll11 i16 1, label %sw.bb0
15 sw.bb0:
25 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
41 i17 10, label %sw.bb0
45 sw.bb0:
55 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
72 i2 1, label %sw.bb0
76 sw.bb0:
86 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
/external/llvm/test/Transforms/CodeGenPrepare/AArch64/
Dwiden_switch.ll11 i16 1, label %sw.bb0
15 sw.bb0:
25 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
41 i17 10, label %sw.bb0
45 sw.bb0:
55 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
72 i2 1, label %sw.bb0
76 sw.bb0:
86 %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
/external/llvm-project/llvm/test/Verifier/
Ddominates.ll14 bb0:
19 %y2 = phi i32 [%y1, %bb0]
26 ; CHECK-NEXT: %y2 = phi i32 [ %y1, %bb0 ]
30 bb0:
48 bb0:
51 %y3 = phi i32 [%y1, %bb0]
56 ; CHECK-NEXT: %y3 = phi i32 [ %y1, %bb0 ]
73 bb0:
/external/llvm-project/llvm/test/Transforms/Util/PredicateInfo/
Ddiamond.ll6 ; CHECK: bb0:
21 br i1 %y, label %bb0, label %bb1
22 bb0:
30 %x3 = phi i32 [ %x, %bb0 ], [ %x2, %bb1 ]
39 ; CHECK: bb0:
54 br i1 %y, label %bb0, label %bb1
55 bb0:
63 %x3 = phi i32 [ %x, %bb0 ], [ %x2, %bb1 ]
/external/llvm/test/Verifier/
Ddominates.ll14 bb0:
19 %y2 = phi i32 [%y1, %bb0]
26 ; CHECK-NEXT: %y2 = phi i32 [ %y1, %bb0 ]
30 bb0:
48 bb0:
51 %y3 = phi i32 [%y1, %bb0]
56 ; CHECK-NEXT: %y3 = phi i32 [ %y1, %bb0 ]
/external/llvm-project/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/
Dtrivial-join-at-loop-exit.ll4 ; CHECK-NOT: DIVERGENT: %Guard.bb2 = phi i1 [ true, %bb1 ], [ false, %bb0 ]
10 bb0:
15 bb1: ; preds = %bb2, %bb0
16 %lsr.iv = phi i32 [ 7, %bb0 ], [ %lsr.iv.next, %bb1 ]
21 %Guard.bb2 = phi i1 [ true, %bb1 ], [ false, %bb0 ]
/external/llvm/test/Analysis/PostDominators/
Dpr1098.ll8 br i1 %x, label %bb1, label %bb0
9 bb0: ; preds = %entry, bb0
10 br label %bb0
/external/llvm-project/llvm/test/Analysis/PostDominators/
Dpr1098.ll8 br i1 %x, label %bb1, label %bb0
9 bb0: ; preds = %entry, bb0
10 br label %bb0

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