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/external/llvm/test/Transforms/LoopVersioning/
Dincorrect-phi.ll13 bb6.lr.ph: ; preds = %bb5.preheader
14 br label %bb6
16 bb6: ; preds = %bb6.lr.ph, %bb6
17 %_tmp1423 = phi i16 [ undef, %bb6.lr.ph ], [ %_tmp142, %bb6 ]
25 br i1 false, label %bb6, label %loop.exit
27 loop.exit: ; preds = %bb6
28 %_tmp142.lcssa = phi i16 [ %_tmp142, %bb6 ]
29 %split = phi i16 [ undef, %bb6 ]
30 ; CHECK: %split = phi i16 [ undef, %bb6 ], [ undef, %bb6.lver.orig ]
39 bb6.lr.ph: ; preds = %bb5.preheader
[all …]
/external/llvm-project/llvm/test/Transforms/SimplifyCFG/
D2008-09-08-MultiplePred.ll9 br i1 %1, label %bb6.preheader, label %entry.return_crit_edge
14 bb6.preheader: ; preds = %entry
15 br i1 %1, label %bb6.preheader.split.us, label %bb6.preheader.split
17 bb6.preheader.split.us: ; preds = %bb6.preheader
20 bb6.preheader.split: ; preds = %bb6.preheader
21 br label %bb6
23 bb6: ; preds = %bb17.bb6_crit_edge, %bb6.preheader.split
24 …%indvar35 = phi i32 [ 0, %bb6.preheader.split ], [ %indvar.next36, %bb17.bb6_crit_edge ] ; <i32> …
25 …%p_129_addr.3.reg2mem.0 = phi i32 [ %p_129_addr.2, %bb17.bb6_crit_edge ], [ %p_129, %bb6.preheader…
27 br i1 %2, label %bb6.bb17_crit_edge, label %bb8
[all …]
D2008-10-03-SpeculativelyExecuteBeforePHI.ll15 br i1 %0, label %bb3, label %bb6
19 br i1 %1, label %bb6, label %bb5
24 bb6: ; preds = %bb3, %bb1
28 bb7: ; preds = %bb6, %bb5
29 %__c2.1 = phi i32 [ 0, %bb5 ], [ %__c2.0, %bb6 ] ; <i32> [#uses=2]
30 %iftmp.1.0 = phi i1 [ false, %bb5 ], [ true, %bb6 ] ; <i1> [#uses=1]
/external/llvm/test/Transforms/SimplifyCFG/
D2008-09-08-MultiplePred.ll9 br i1 %1, label %bb6.preheader, label %entry.return_crit_edge
14 bb6.preheader: ; preds = %entry
15 br i1 %1, label %bb6.preheader.split.us, label %bb6.preheader.split
17 bb6.preheader.split.us: ; preds = %bb6.preheader
20 bb6.preheader.split: ; preds = %bb6.preheader
21 br label %bb6
23 bb6: ; preds = %bb17.bb6_crit_edge, %bb6.preheader.split
24 …%indvar35 = phi i32 [ 0, %bb6.preheader.split ], [ %indvar.next36, %bb17.bb6_crit_edge ] ; <i32> …
25 …%p_129_addr.3.reg2mem.0 = phi i32 [ %p_129_addr.2, %bb17.bb6_crit_edge ], [ %p_129, %bb6.preheader…
27 br i1 %2, label %bb6.bb17_crit_edge, label %bb8
[all …]
D2008-10-03-SpeculativelyExecuteBeforePHI.ll15 br i1 %0, label %bb3, label %bb6
19 br i1 %1, label %bb6, label %bb5
24 bb6: ; preds = %bb3, %bb1
28 bb7: ; preds = %bb6, %bb5
29 %__c2.1 = phi i32 [ 0, %bb5 ], [ %__c2.0, %bb6 ] ; <i32> [#uses=2]
30 %iftmp.1.0 = phi i1 [ false, %bb5 ], [ true, %bb6 ] ; <i1> [#uses=1]
/external/llvm-project/llvm/test/Transforms/LoopVersioning/
Dincorrect-phi.ll13 bb6.lr.ph: ; preds = %bb5.preheader
14 br label %bb6
16 bb6: ; preds = %bb6.lr.ph, %bb6
17 %_tmp1423 = phi i64 [ undef, %bb6.lr.ph ], [ %_tmp142, %bb6 ]
24 br i1 false, label %bb6, label %loop.exit
26 loop.exit: ; preds = %bb6
27 %_tmp142.lcssa = phi i64 [ %_tmp142, %bb6 ]
28 %split = phi i16 [ undef, %bb6 ]
29 ; CHECK: %split.ph = phi i16 [ undef, %bb6.lver.orig ]
30 ; CHECK: %split.ph3 = phi i16 [ undef, %bb6 ]
[all …]
/external/llvm-project/llvm/test/Analysis/ScalarEvolution/
Dptrtoint.ll382 ; X64-NEXT: %i7 = phi i8* [ %arg, %bb3 ], [ %i14, %bb6 ]
383 ; X64-NEXT: --> {%arg,+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + %arg1) LoopDispositio…
385 ; X64-NEXT: --> %i8 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Variant…
387 …o i64),+,1}<nuw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * %arg) + (ptrtoint i8* %arg to i6…
389 ; X64-NEXT: --> {0,+,1}<nw><%bb6> U: [0,-1) S: [0,-1) Exits: (-1 + (-1 * %arg) + %arg1) LoopDisp…
391 …EXT: --> {%arg2,+,1}<nw><%bb6> U: full-set S: full-set Exits: (-1 + (-1 * %arg) + %arg1 + %arg2…
393 ; X64-NEXT: --> %i12 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6: Varian…
395 ; X64-NEXT: --> (%i12 + %i8) U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %bb6
397 … X64-NEXT: --> {(1 + %arg)<nuw>,+,1}<nuw><%bb6> U: [1,0) S: [1,0) Exits: %arg1 LoopDispositions…
399 ; X64-NEXT: Loop %bb6: backedge-taken count is (-1 + (-1 * %arg) + %arg1)
[all …]
D2007-11-14-SignedAddRec.ll10 br label %bb6
12 bb: ; preds = %bb6
15 br label %bb6
17 bb6: ; preds = %bb, %entry
23 bb10: ; preds = %bb6
/external/llvm-project/polly/test/GPGPU/
Dpartial_writes.ll22 br label %bb6
24 bb6: ; preds = %bb6, %bb2
25 %tmp7 = phi double [ undef, %bb2 ], [ undef, %bb6 ]
26 %tmp8 = phi i64 [ 0, %bb2 ], [ %tmp9, %bb6 ]
30 br i1 %tmp10, label %bb11, label %bb6
32 bb11: ; preds = %bb6
/external/llvm-project/llvm/test/Transforms/LoopLoadElim/
Dpr47457.ll15 bb1: ; preds = %bb6, %bb1, %bb
16 %tmp = phi i32 [ undef, %bb ], [ 0, %bb1 ], [ %tmp3, %bb6 ]
22 br i1 %tmp4, label %bb6, label %bb5
27 bb6: ; preds = %bb2
30 bb7: ; preds = %bb7, %bb6
31 %tmp8 = phi i32 [ %tmp15, %bb7 ], [ %tmp3, %bb6 ]
32 %tmp9 = phi i32 [ %tmp8, %bb7 ], [ %tmp, %bb6 ]
/external/llvm-project/llvm/test/Analysis/MemorySSA/
Dnondeterminism.ll19 bb4.us4: ; preds = %bb2.split.us32, %bb6.us28
20 %i.4.01.us5 = phi i16 [ %_tmp49.us30, %bb6.us28 ]
28 br label %bb6.us28
31 br label %bb6.us28
33 bb6.us28: ; preds = %bb5.us26, %g.exit4.us21
38 bb4.us.us: ; preds = %bb2.split.us.us, %bb6.us.us
39 %i.4.01.us.us = phi i16 [ %_tmp49.us.us, %bb6.us.us ]
50 br label %bb6.us.us
52 bb6.us.us: ; preds = %bb5.us.us, %g.exit4.us.us
71 bb4.us: ; preds = %bb6.us, %bb2.split.us
[all …]
/external/llvm-project/llvm/test/Transforms/NewGVN/
Dpr34430.ll19 ; CHECK: bb6:
23 br i1 undef, label %bb6, label %bb1
26 br label %bb6
30 br i1 %tmp, label %bb3, label %bb6
35 bb4: ; preds = %bb6, %bb3
36 %tmp5 = phi i8 [ %tmp5, %bb3 ], [ %tmp7, %bb6 ]
37 br i1 undef, label %bb2, label %bb6
39 bb6: ; preds = %bb4, %bb2, %bb1, %bb
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dreg-coalescer-sched-crash.ll17 br label %bb6
19 bb4: ; preds = %bb6, %bb
20 %tmp5 = phi <2 x i32> [ zeroinitializer, %bb ], [ %tmp13, %bb6 ]
23 bb6: ; preds = %bb6, %bb3
24 %tmp7 = phi <2 x i32> [ zeroinitializer, %bb3 ], [ %tmp13, %bb6 ]
32 br i1 %tmp14, label %bb6, label %bb4
/external/llvm/test/CodeGen/AMDGPU/
Dreg-coalescer-sched-crash.ll17 br label %bb6
19 bb4: ; preds = %bb6, %bb
20 %tmp5 = phi <2 x i32> [ zeroinitializer, %bb ], [ %tmp13, %bb6 ]
23 bb6: ; preds = %bb6, %bb3
24 %tmp7 = phi <2 x i32> [ zeroinitializer, %bb3 ], [ %tmp13, %bb6 ]
32 br i1 %tmp14, label %bb6, label %bb4
/external/llvm/test/Analysis/ScalarEvolution/
D2007-11-14-SignedAddRec.ll10 br label %bb6
12 bb: ; preds = %bb6
15 br label %bb6
17 bb6: ; preds = %bb, %entry
23 bb10: ; preds = %bb6
/external/llvm-project/llvm/test/Transforms/SCCP/
D2002-05-21-InvalidSimplify.ll1 ; This test shows SCCP "proving" that the loop (from bb6 to 14) loops infinitely
10 br label %bb6
11 bb6: ; preds = %bb14, %bb3
15 bb11: ; preds = %bb11, %bb6
16 %reg407 = phi i32 [ %reg408, %bb11 ], [ 0, %bb6 ] ; <i32> [#uses=2]
29 br i1 %cond553, label %bb6, label %bb15
/external/llvm/test/Transforms/SCCP/
D2002-05-21-InvalidSimplify.ll1 ; This test shows SCCP "proving" that the loop (from bb6 to 14) loops infinitely
10 br label %bb6
11 bb6: ; preds = %bb14, %bb3
15 bb11: ; preds = %bb11, %bb6
16 %reg407 = phi i32 [ %reg408, %bb11 ], [ 0, %bb6 ] ; <i32> [#uses=2]
29 br i1 %cond553, label %bb6, label %bb15
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr47874.ll15 ; SSE2-NEXT: LBB0_2: ## %bb6
36 ; AVX-NEXT: LBB0_2: ## %bb6
56 br label %bb6
58 bb5: ; preds = %bb6, %bb
61 bb6: ; preds = %bb6, %bb2
62 %i7 = phi i64 [ 0, %bb2 ], [ %i11, %bb6 ]
70 br i1 %i12, label %bb5, label %bb6
81 ; SSE2-NEXT: LBB1_2: ## %bb6
101 ; AVX-NEXT: LBB1_2: ## %bb6
120 br label %bb6
[all …]
D2007-10-14-CoalescerCrash.ll10 br i1 false, label %bb6, label %bb31
12 bb6: ; preds = %bb
17 bb23: ; preds = %bb6
22 bb31: ; preds = %bb23, %bb6, %bb
23 %result.0 = phi i64 [ %tmp27, %bb23 ], [ 0, %bb ], [ 0, %bb6 ] ; <i64> [#uses=0]
/external/llvm-project/polly/test/Isl/CodeGen/
Dphi-defined-before-scop.ll4 … = phi %struct.wibble* [ %tmp7.ph.final_reload, %polly.exiting ], [ %tmp7.ph, %bb6.region_exiting ]
21 bb1: ; preds = %bb6, %bb
22 %tmp2 = phi %struct.wibble* [ %tmp7, %bb6 ], [ undef, %bb ]
28 br i1 false, label %bb6, label %bb5
31 br label %bb6
33 bb6: ; preds = %bb5, %bb3
37 bb8: ; preds = %bb6
/external/llvm/test/Transforms/ADCE/
D2002-07-17-PHIAssertion.ll12 bb2: ; preds = %bb6, %bb0
13 %reg128 = phi i32 [ %reg130, %bb6 ], [ 0, %bb0 ] ; <i32> [#uses=2]
22 br i1 %cond241, label %bb6, label %bb5
25 br label %bb6
27 bb6: ; preds = %bb5, %bb4
31 bb7: ; preds = %bb6
/external/llvm/test/CodeGen/X86/
D2007-10-14-CoalescerCrash.ll10 br i1 false, label %bb6, label %bb31
12 bb6: ; preds = %bb
17 bb23: ; preds = %bb6
22 bb31: ; preds = %bb23, %bb6, %bb
23 %result.0 = phi i64 [ %tmp27, %bb23 ], [ 0, %bb ], [ 0, %bb6 ] ; <i64> [#uses=0]
/external/llvm-project/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/
Dpropagate-loop-live-out.ll3 ; CHECK: bb6:
32 br i1 %i2, label %bb5, label %bb6
35 br label %bb6
37 bb6: ; preds = %bb5, %bb4
41 bb7: ; preds = %bb6
44 bb8: ; preds = %bb7, %bb6
/external/llvm/test/Transforms/LoopStrengthReduce/
Dcount-to-zero.ll9 br label %bb6
11 bb1: ; preds = %bb6
26 br label %bb6
28 bb6: ; preds = %bb3, %entry
37 bb7: ; preds = %bb6, %bb2
38 %c_addr.0 = phi i32 [ %tmp1, %bb2 ], [ %c_addr.1, %bb6 ] ; <i32> [#uses=1]
/external/llvm/test/CodeGen/Thumb2/
D2009-08-04-SubregLoweringBug.ll12 br i1 undef, label %bb, label %bb6.preheader
14 bb6.preheader: ; preds = %entry
21 bb13: ; preds = %bb13, %bb6.preheader
26 bb15: ; preds = %bb13, %bb6.preheader
27 %r1.0.0.lcssa = phi float [ 0.000000e+00, %bb6.preheader ], [ %1, %bb13 ] ; <float> [#uses=1]
28 %r1.1.0.lcssa = phi float [ undef, %bb6.preheader ], [ %0, %bb13 ] ; <float> [#uses=0]

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