Searched refs:bitfield_extract (Results 1 – 7 of 7) sorted by relevance
| /external/mesa3d/src/compiler/glsl/ |
| D | lower_packing_builtins.cpp | 321 factory.emit(assign(i2, bitfield_extract(i, constant(0), constant(16)), in unpack_uint_to_ivec2()
323 factory.emit(assign(i2, bitfield_extract(i, constant(16), constant(16)), in unpack_uint_to_ivec2()
355 factory.emit(assign(u4, bitfield_extract(u, constant(8u), constant(8u)), in unpack_uint_to_uvec4()
359 factory.emit(assign(u4, bitfield_extract(u, constant(16u), constant(8u)), in unpack_uint_to_uvec4()
402 factory.emit(assign(i4, bitfield_extract(i, constant(0), constant(8)), in unpack_uint_to_ivec4()
404 factory.emit(assign(i4, bitfield_extract(i, constant(8), constant(8)), in unpack_uint_to_ivec4()
406 factory.emit(assign(i4, bitfield_extract(i, constant(16), constant(8)), in unpack_uint_to_ivec4()
408 factory.emit(assign(i4, bitfield_extract(i, constant(24), constant(8)), in unpack_uint_to_ivec4()
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| D | ir_builder.h | 214 ir_expression *bitfield_extract(operand a, operand b, operand c);
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| D | ir_builder.cpp | 606 bitfield_extract(operand a, operand b, operand c) in bitfield_extract() function
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_lower_tess.c | 51 bitfield_extract(nir_builder *b, nir_ssa_def *v, uint32_t start, uint32_t mask) in bitfield_extract() function
60 return bitfield_extract(b, state->header, 11, 31); in build_invocation_id()
66 return bitfield_extract(b, state->header, 6, 31); in build_vertex_id()
72 return bitfield_extract(b, state->header, state->local_primitive_id_start, 63); in build_local_primitive_id()
276 return bitfield_extract(b, nir_load_gs_header_ir3(b), 16, 1023); in local_thread_id()
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| /external/mesa3d/docs/relnotes/ |
| D | 18.2.2.rst | 121 - radeonsi: add a workaround for bitfield_extract when count is 0
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| D | 19.0.0.rst | 2278 - ac/nir: remove the bitfield_extract workaround for LLVM 8
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| D | 20.2.0.rst | 4227 - glsl_to_nir: fix bitfield_extract with 16-bit operands
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