/external/llvm/include/llvm/CodeGen/ |
D | ValueTypes.h | 212 bool bitsLT(EVT VT) const { in bitsLT() function
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D | MachineValueType.h | 542 bool bitsLT(MVT VT) const { in bitsLT() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMSelectionDAGInfo.cpp | 92 else if (Src.getValueType().bitsLT(MVT::i32)) in EmitSpecializedLibcall()
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/external/llvm/lib/Target/ARM/ |
D | ARMSelectionDAGInfo.cpp | 93 else if (Src.getValueType().bitsLT(MVT::i32)) in EmitSpecializedLibcall()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ValueTypes.h | 243 bool bitsLT(EVT VT) const { in bitsLT() function
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMSelectionDAGInfo.cpp | 92 else if (Src.getValueType().bitsLT(MVT::i32)) in EmitSpecializedLibcall()
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | ValueTypes.h | 262 bool bitsLT(EVT VT) const { in bitsLT() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 976 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT() 1432 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown() 1490 if (VT.bitsLT(MinVT)) in GetReturnInfo()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 1154 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT() 1557 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown() 1592 if (VT.bitsLT(MinVT)) in GetReturnInfo()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 1116 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT() 1611 if (EVT(DestVT).bitsLT(NewVT)) { // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown() 1674 if (VT.bitsLT(MinVT)) in GetReturnInfo()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 4347 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in foldCONCAT_VECTORS() 4579 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4606 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4625 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4644 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4682 .bitsLT(VT.getScalarType())) in getNode() 4933 if (LegalSVT.bitsLT(SVT)) in FoldConstantArithmetic() 5020 if (LegalSVT.bitsLT(VT.getScalarType())) in FoldConstantVectorArithmetic() 6231 if (VT.bitsLT(LargestVT)) { in getMemsetStores() 6832 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && in getLoad() [all …]
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D | LegalizeTypesGeneric.cpp | 219 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); in ExpandRes_EXTRACT_VECTOR_ELT()
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D | FastISel.cpp | 518 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 1902 if (DstVT.bitsLT(SrcVT)) in selectOperator()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 231 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); in ExpandRes_EXTRACT_VECTOR_ELT()
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D | SelectionDAG.cpp | 2872 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in FoldCONCAT_VECTORS() 3063 assert(Operand.getValueType().bitsLT(VT) && in getNode() 3076 assert(Operand.getValueType().bitsLT(VT) && in getNode() 3092 assert(Operand.getValueType().bitsLT(VT) && in getNode() 3109 assert(Operand.getValueType().bitsLT(VT) && in getNode() 3142 .bitsLT(VT.getScalarType())) in getNode() 3412 if (LegalSVT.bitsLT(VT.getScalarType())) in FoldConstantVectorArithmetic() 4572 if (VT.bitsLT(LargestVT)) { in getMemsetStores() 5094 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && in getLoad() 5272 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && in getTruncStore()
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D | LegalizeDAG.cpp | 1324 if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) { in ExpandVectorBuildThroughStack() 2321 } else if (DestVT.bitsLT(MVT::f64)) { in ExpandLegalINT_TO_FP() 3008 if (NewEltVT.bitsLT(EltVT)) { in ExpandNode() 4255 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode() 4288 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode() 4335 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
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D | FastISel.cpp | 328 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 1657 if (DstVT.bitsLT(SrcVT)) in selectOperator()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 4311 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT); in foldCONCAT_VECTORS() 4559 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4586 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4605 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4624 assert(Operand.getValueType().bitsLT(VT) && in getNode() 4662 .bitsLT(VT.getScalarType())) in getNode() 4938 if (LegalSVT.bitsLT(SVT)) in FoldConstantArithmetic() 5032 if (LegalSVT.bitsLT(VT.getScalarType())) in FoldConstantVectorArithmetic() 6354 if (VT.bitsLT(LargestVT)) { in getMemsetStores() 6968 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && in getLoad() [all …]
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D | LegalizeTypesGeneric.cpp | 225 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); in ExpandRes_EXTRACT_VECTOR_ELT()
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D | FastISel.cpp | 532 if (IdxVT.bitsLT(PtrVT)) { in getRegForGEPIndex() 1964 if (DstVT.bitsLT(SrcVT)) in selectOperator()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
D | MachineValueType.h | 873 bool bitsLT(MVT VT) const { in bitsLT() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 1329 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE() 1447 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD() 1673 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 1335 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE() 1453 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD() 1679 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 1426 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE() 1572 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD() 1827 if (VT.bitsLT(MVT::i32)) in allowsMisalignedMemoryAccesses()
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/external/llvm-project/llvm/include/llvm/Support/ |
D | MachineValueType.h | 1056 bool bitsLT(MVT VT) const { in bitsLT() function
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