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Searched refs:blsr (Results 1 – 16 of 16) sorted by relevance

/external/llvm-project/llvm/test/tools/llvm-mca/X86/Haswell/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/SkylakeServer/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/SkylakeClient/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver1/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Broadwell/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/capstone/arch/X86/
DX86MappingInsnOp_reduce.inc684 { /* X86_BLSR32rm, X86_INS_BLSR: blsr{l} $dst, $src */
688 { /* X86_BLSR32rr, X86_INS_BLSR: blsr{l} $dst, $src */
692 { /* X86_BLSR64rm, X86_INS_BLSR: blsr{q} $dst, $src */
696 { /* X86_BLSR64rr, X86_INS_BLSR: blsr{q} $dst, $src */
DX86MappingInsnOp.inc892 { /* X86_BLSR32rm, X86_INS_BLSR: blsr{l} $dst, $src */
896 { /* X86_BLSR32rr, X86_INS_BLSR: blsr{l} $dst, $src */
900 { /* X86_BLSR64rm, X86_INS_BLSR: blsr{q} $dst, $src */
904 { /* X86_BLSR64rr, X86_INS_BLSR: blsr{q} $dst, $src */
/external/llvm-project/llvm/test/CodeGen/X86/
Dbmi.ll1002 ; The add here used to get shrunk, but the and did not thus hiding the blsr pattern.
/external/llvm/lib/Target/X86/
DX86InstrInfo.td2220 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem>;
2221 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td2432 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem, WriteBLS>;
2433 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem, WriteBLS>, VEX_W;
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td2498 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem, WriteBLS>;
2499 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem, WriteBLS>, VEX_W;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc7621 "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl"
22768 { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22769 …{ 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22770 { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22771 …{ 514 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },