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Searched refs:bpe (Results 1 – 25 of 33) sorted by relevance

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/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c35 tileb = 8 * 8 * surf->bpe; in cik_get_macro_tile_index()
68 unsigned bpe) in surf_level_winsys_to_drm() argument
74 level_drm->pitch_bytes = level_ws->nblk_x * bpe; in surf_level_winsys_to_drm()
80 unsigned bpe) in surf_level_drm_to_winsys() argument
87 assert(level_drm->nblk_x * bpe == level_drm->pitch_bytes); in surf_level_drm_to_winsys()
92 unsigned flags, unsigned bpe, in surf_winsys_to_drm() argument
108 surf_drm->bpe = bpe; in surf_winsys_to_drm()
158 bpe * surf_drm->nsamples); in surf_winsys_to_drm()
185 surf_ws->bpe = surf_drm->bpe; in surf_drm_to_winsys()
202 surf_drm->bpe * surf_drm->nsamples); in surf_drm_to_winsys()
[all …]
/external/libdrm/radeon/
Dradeon_surface.c169 unsigned bpe, unsigned level, in surf_minify() argument
191 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; in surf_minify()
280 xalign = MAX2(1, surf_man->hw_info.group_bytes / surf->bpe); in r6_surface_init_linear()
284 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign); in r6_surface_init_linear()
290 surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); in r6_surface_init_linear()
311 xalign = MAX2(64, surf_man->hw_info.group_bytes / surf->bpe); in r6_surface_init_linear_aligned()
318 surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); in r6_surface_init_linear_aligned()
337 xalign = surf_man->hw_info.group_bytes / (tilew * surf->bpe * surf->nsamples); in r6_surface_init_1d()
342 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign); in r6_surface_init_1d()
351 surf_minify(surf, surf->level+i, surf->bpe, i, xalign, yalign, zalign, offset); in r6_surface_init_1d()
[all …]
Dradeon_surface.h119 uint32_t bpe; member
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c65 unsigned flags, unsigned bpe, in amdgpu_surface_init() argument
78 surf->bpe = bpe; in amdgpu_surface_init()
/external/mesa3d/src/amd/common/
Dac_surface.c683 tileb = 8 * 8 * surf->bpe; in cik_get_macro_tile_index()
696 unsigned bpe = surf->bpe; in get_display_flag() local
706 (bpe >= 4 && bpe <= 8 && num_channels == 4) || in get_display_flag()
708 (bpe == 2 && num_channels >= 3) || in get_display_flag()
710 (bpe == 1 && num_channels == 1)) in get_display_flag()
891 switch (surf->bpe) { in gfx6_compute_surface()
902 AddrDccIn.bpp = AddrSurfInfoIn.bpp = surf->bpe * 8; in gfx6_compute_surface()
1008 if (surf->bpe == 2) in gfx6_compute_surface()
1013 if (surf->bpe == 1) in gfx6_compute_surface()
1015 else if (surf->bpe == 2) in gfx6_compute_surface()
[all …]
Dac_surface.h196 unsigned bpe : 5; member
/external/mesa3d/src/gallium/drivers/r600/
Dr600_texture.c58 if (rdst->surface.bpe != rsrc->surface.bpe) in r600_prepare_for_dma_blit()
181 rtex->surface.bpe; in r600_texture_get_offset()
194 box->x / rtex->surface.blk_w) * rtex->surface.bpe; in r600_texture_get_offset()
211 unsigned i, bpe, flags = 0; in r600_init_surface() local
218 bpe = 4; /* stencil is allocated separately on evergreen */ in r600_init_surface()
220 bpe = util_format_get_blocksize(ptex->format); in r600_init_surface()
221 assert(util_is_power_of_two_or_zero(bpe)); in r600_init_surface()
248 flags, bpe, array_mode, surface); in r600_init_surface()
254 pitch_in_bytes_override != surface->u.legacy.level[0].nblk_x * bpe) { in r600_init_surface()
258 surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe; in r600_init_surface()
[all …]
Dradeon_vce.c234 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in rvce_frame_offset()
455 cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in rvce_create_encoder()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vce_40_2_2.c85 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create()
86 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create()
315 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
316 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
Dradeon_vce_52.c196 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create()
197 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create()
200 RVCE_CS(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe); // encRefPicLumaPitch in create()
201 RVCE_CS(enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe); // encRefPicChromaPitch in create()
272 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
273 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
280 RVCE_CS(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe); // encInputPicLumaPitch in encode()
281 RVCE_CS(enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe); // encInputPicChromaPitch in encode()
Dradeon_vce_50.c125 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode()
126 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
Dradeon_vce.c223 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in si_vce_frame_offset()
226 pitch = align(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe, 256); in si_vce_frame_offset()
451 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in si_vce_create_encoder()
455 align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) * in si_vce_create_encoder()
Dradeon_uvd_enc_1_1.c760 enc->enc_pic.ctx_buf.rec_luma_pitch = (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); in radeon_uvd_enc_ctx()
762 (enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); in radeon_uvd_enc_ctx()
764 enc->enc_pic.ctx_buf.rec_luma_pitch = enc->luma->u.gfx9.surf_pitch * enc->luma->bpe; in radeon_uvd_enc_ctx()
765 enc->enc_pic.ctx_buf.rec_chroma_pitch = enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe; in radeon_uvd_enc_ctx()
879 (enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); in radeon_uvd_enc_encode_params_hevc()
881 (enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); in radeon_uvd_enc_encode_params_hevc()
883 enc->enc_pic.enc_params.input_pic_luma_pitch = enc->luma->u.gfx9.surf_pitch * enc->luma->bpe; in radeon_uvd_enc_encode_params_hevc()
885 enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe; in radeon_uvd_enc_encode_params_hevc()
Dradeon_uvd_enc.c326 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in radeon_uvd_create_encoder()
328 : align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) * in radeon_uvd_create_encoder()
Dradeon_winsys.h693 unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf);
Dradeon_vcn_enc.c441 ? align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in radeon_create_encoder()
443 : align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) * in radeon_create_encoder()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_texture.c56 if (dst->surface.bpe != src->surface.bpe) in si_prepare_for_dma_blit()
186 *stride = tex->surface.u.gfx9.surf_pitch * tex->surface.bpe; in si_texture_get_offset()
198 tex->surface.bpe; in si_texture_get_offset()
200 *stride = tex->surface.u.legacy.level[level].nblk_x * tex->surface.bpe; in si_texture_get_offset()
213 tex->surface.bpe; in si_texture_get_offset()
225 unsigned bpe, flags = 0; in si_init_surface() local
231 bpe = 4; /* stencil is allocated separately */ in si_init_surface()
233 bpe = util_format_get_blocksize(ptex->format); in si_init_surface()
234 assert(util_is_power_of_two_or_zero(bpe)); in si_init_surface()
251 bpe = 4; in si_init_surface()
[all …]
Dsi_clear.c64 if (tex->surface.bpe == 16) { in si_set_clear_color()
334 switch (tex->surface.bpe) { in si_set_optimal_micro_tile_mode()
347 switch (tex->surface.bpe) { in si_set_optimal_micro_tile_mode()
498 if (tex->surface.bpe > 8) { in si_do_fast_color_clear()
Dsi_state_binning.c74 sum += tex->surface.bpe; in si_get_color_bin_size()
341 cColor += tex->surface.bpe * mmrt; in gfx10_get_bin_sizes()
Dcik_sdma.c44 return (set_bpp ? util_logbase2(tex->surface.bpe) : 0) | (G_009910_ARRAY_MODE(tile_mode) << 3) | in encode_tile_info()
63 unsigned bpp = sdst->surface.bpe; in si_sdma_v4_copy_texture()
209 unsigned bpp = sdst->surface.bpe; in cik_sdma_copy_texture()
Dsi_blit.c899 unsigned blocksize = ssrc->surface.bpe; in si_resource_copy_region()
942 unsigned blocksize = ssrc->surface.bpe; in si_resource_copy_region()
/external/mesa3d/src/amd/addrlib/src/core/
Daddrlib2.cpp895 else if ((pIn->bpe != 0) && in ComputeSlicePipeBankXor()
896 (pIn->bpe != 8) && in ComputeSlicePipeBankXor()
897 (pIn->bpe != 16) && in ComputeSlicePipeBankXor()
898 (pIn->bpe != 32) && in ComputeSlicePipeBankXor()
899 (pIn->bpe != 64) && in ComputeSlicePipeBankXor()
900 (pIn->bpe != 128)) in ComputeSlicePipeBankXor()
/external/python/cpython3/Lib/concurrent/futures/
Dprocess.py446 bpe = BrokenProcessPool("A process in the process pool was "
450 bpe.__cause__ = _RemoteTraceback(
455 work_item.future.set_exception(bpe)
/external/mesa3d/src/amd/vulkan/
Dradv_image.c1243 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in radv_init_metadata()
1264 if (!surf->cmask_size || surf->cmask_offset || surf->bpe > 8 || in radv_image_alloc_single_sample_cmask()
1325 image->planes[i].surface.bpe = vk_format_get_blocksize(vk_format_depth_only(format)); in radv_image_reset_layout()
1328 if (image->planes[i].surface.bpe == 3) { in radv_image_reset_layout()
1329 image->planes[i].surface.bpe = 4; in radv_image_reset_layout()
1878 pLayout->rowPitch = surface->u.gfx9.surf_pitch * surface->bpe / 3; in radv_GetImageSubresourceLayout()
1882 assert(util_is_power_of_two_nonzero(surface->bpe)); in radv_GetImageSubresourceLayout()
1883 pLayout->rowPitch = pitch * surface->bpe; in radv_GetImageSubresourceLayout()
1893 pLayout->rowPitch = surface->u.legacy.level[level].nblk_x * surface->bpe; in radv_GetImageSubresourceLayout()
/external/mesa3d/src/amd/addrlib/src/
Daddrinterface.cpp868 UINT_32 bpe = 0; in ElemSize() local
874 bpe = pLib->GetBpe(format); in ElemSize()
877 return bpe; in ElemSize()

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