Searched refs:brw_vec8_reg (Results 1 – 4 of 4) sorted by relevance
/external/igt-gpu-tools/assembler/ |
D | brw_reg.h | 240 brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr) in brw_vec8_reg() function 351 return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); in brw_uw8_reg() 495 return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); in brw_vec8_grf() 516 return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0); in brw_null_reg() 546 return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0); in brw_acc_reg() 583 return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); in brw_message_reg()
|
/external/mesa3d/src/intel/compiler/ |
D | brw_reg.h | 469 brw_vec8_reg(enum brw_reg_file file, unsigned nr, unsigned subnr) in brw_vec8_reg() function 547 return brw_vec8_reg(file, nr, subnr); in brw_vecn_reg() 610 return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); in brw_uw8_reg() 795 return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); in brw_vec8_grf() 829 return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0); in brw_null_reg() 960 return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); in brw_message_reg()
|
D | test_eu_compact.cpp | 216 struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0); in gen_ADD_MRF_GRF_GRF() 236 struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0); in gen_PLN_MRF_GRF_GRF()
|
D | brw_compile_sf.c | 325 c->m1Cx = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 1, 0); in alloc_regs() 326 c->m2Cy = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 2, 0); in alloc_regs() 327 c->m3C0 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 3, 0); in alloc_regs()
|