| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | LegalizerHelperTest.cpp | 707 auto Val0 = B.buildBitcast(v2s32, Copies[0]); in TEST_F()
708 auto Val1 = B.buildBitcast(v2s32, Copies[1]); in TEST_F()
886 auto VecVal0 = B.buildBitcast(v2s32, Copies[0]); in TEST_F()
887 auto VecVal1 = B.buildBitcast(v2s32, Copies[1]); in TEST_F()
2364 auto BitcastV2S32 = B.buildBitcast(V2S32, Copies[0]); in TEST_F()
2488 auto Cast = B.buildBitcast(LLT::vector(2, 32), Copies[0]); in TEST_F()
2841 auto Vector = B.buildBitcast(V2S32, Copies[0]); in TEST_F()
2894 auto Vector = B.buildBitcast(V2S32, Copies[0]); in TEST_F()
2978 auto Vector1 = B.buildBitcast(V2S32, Copies[0]); in TEST_F()
2979 auto Vector2 = B.buildBitcast(V4S16, Copies[0]); in TEST_F()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 712 auto Bitcast = MIRBuilder.buildBitcast({NewTy}, {ValReg}); in legalizeLoadStore()
717 MIRBuilder.buildBitcast({ValReg}, {NewLoad}); in legalizeLoadStore()
|
| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 875 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore()
879 MIRBuilder.buildBitcast(ValReg, NewLoad); in legalizeLoadStore()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 1298 return MIRBuilder.buildBitcast(NewTy, NewVal).getReg(0); in coerceToScalar()
1372 Op.setReg(MIRBuilder.buildBitcast(CastTy, Op).getReg(0)); in bitcastSrc()
1379 MIRBuilder.buildBitcast(MO, CastDst); in bitcastDst()
2394 SrcReg = MIRBuilder.buildBitcast(DstCastTy, SrcReg).getReg(0); in lowerBitcast()
2459 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastExtractVectorElt()
2494 MIRBuilder.buildBitcast(Dst, NewVec); in bitcastExtractVectorElt()
2603 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastInsertVectorElt()
2637 MIRBuilder.buildBitcast(Dst, InsertedElt); in bitcastInsertVectorElt()
3856 SrcReg = MIRBuilder.buildBitcast(SrcTy, SrcReg).getReg(0); in reduceOperationWidth()
3920 MIRBuilder.buildBitcast(DstReg, MergeDstReg); in reduceOperationWidth()
[all …]
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1622 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32()
2097 B.buildBitcast(MI.getOperand(0).getReg(), Vec); in foldInsertEltToCmpSelect()
2679 B.buildBitcast(DstReg, Or); in applyMappingImpl()
2758 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2876 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2911 B.buildBitcast(DstReg, InsHi); in applyMappingImpl()
2928 B.buildBitcast(DstReg, InsHi); in applyMappingImpl()
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| D | AMDGPULegalizerInfo.cpp | 2636 B.buildBitcast(Dst, Merge); in legalizeBuildVector()
3552 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
3565 return B.buildBitcast(LLT::vector(3, S32), Reg).getReg(0); in handleD16VData()
3570 Reg = B.buildBitcast(LLT::vector(2, S32), Reg).getReg(0); in handleD16VData()
3971 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImageA16AddressToDwords()
4368 B.buildBitcast(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
4382 Reg = B.buildBitcast(V2S16, Reg).getReg(0); in legalizeImageIntrinsic()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1928 B.buildBitcast(DstReg, Or); in applyMappingImpl()
1981 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2061 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2076 B.buildBitcast(DstReg, InsHi); in applyMappingImpl()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 539 MachineInstrBuilder buildBitcast(const DstOp &Dst, const SrcOp &Src) { in buildBitcast() function
|
| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 636 MachineInstrBuilder buildBitcast(const DstOp &Dst, const SrcOp &Src) { in buildBitcast() function
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4177 Register Cast = MIRBuilder.buildBitcast(IntTy, SrcReg).getReg(0); in lowerUnmergeValues()
4302 Src = MIRBuilder.buildBitcast(SrcIntTy, Src).getReg(0); in lowerExtract()
4335 Src = MIRBuilder.buildBitcast(IntDstTy, Src).getReg(0); in lowerInsert()
4351 MIRBuilder.buildBitcast(Dst, Or); in lowerInsert()
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