/external/llvm-project/llvm/lib/FuzzMutate/ |
D | Operations.cpp | 271 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertValueDescriptor() local 279 buildInsert}; in insertValueDescriptor() 291 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertElementDescriptor() local 297 buildInsert}; in insertElementDescriptor()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/ |
D | Operations.cpp | 267 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertValueDescriptor() local 275 buildInsert}; in insertValueDescriptor() 287 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertElementDescriptor() local 293 buildInsert}; in insertElementDescriptor()
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/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
D | LegalizerHelperTest.cpp | 2366 auto InsertS64S32 = B.buildInsert(S64, Copies[0], TruncS32, 0); in TEST_F() 2367 auto InsertS64P1 = B.buildInsert(S64, Copies[0], IntToPtrP1, 8); in TEST_F() 2368 auto InsertP0S32 = B.buildInsert(P0, IntToPtrP0, TruncS32, 16); in TEST_F() 2369 auto InsertP0P1 = B.buildInsert(P0, IntToPtrP0, IntToPtrP1, 4); in TEST_F() 2370 auto InsertV2S32S32 = B.buildInsert(V2S32, BitcastV2S32, TruncS32, 32); in TEST_F() 2371 auto InsertV2S32P1 = B.buildInsert(V2S32, BitcastV2S32, IntToPtrP1, 0); in TEST_F()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | CallLowering.cpp | 186 MIRBuilder.buildInsert(NewDst, Dst, SrcRegs[i], Offsets[i]); in packRegs()
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D | MachineIRBuilder.cpp | 558 buildInsert(ResOut, ResIn, Ops[i], Indices[i]); in buildSequence() 676 MachineInstrBuilder MachineIRBuilder::buildInsert(const DstOp &Res, in buildInsert() function in MachineIRBuilder
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D | LegalizerHelper.cpp | 230 MIRBuilder.buildInsert(NewResultReg, CurResultReg, PartReg, Offset); in insertParts() 240 MIRBuilder.buildInsert(NewResultReg, CurResultReg, LeftoverRegs[I], Offset); in insertParts() 1366 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0); in moreElementsVectorSrc() 4610 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalarInsert()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | CallLowering.cpp | 148 MIRBuilder.buildInsert(NewDst, Dst, SrcRegs[i], Offsets[i]); in packRegs()
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D | MachineIRBuilder.cpp | 563 buildInsert(ResOut, ResIn, Ops[i], Indices[i]); in buildSequence() 645 MachineInstrBuilder MachineIRBuilder::buildInsert(Register Res, Register Src, in buildInsert() function in MachineIRBuilder
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D | LegalizerHelper.cpp | 224 MIRBuilder.buildInsert(NewResultReg, CurResultReg, PartReg, Offset); in insertParts() 234 MIRBuilder.buildInsert(NewResultReg, CurResultReg, LeftoverRegs[I], Offset); in insertParts() 1171 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0); in moreElementsVectorSrc() 2391 MIRBuilder.buildInsert(PartInsertReg, AccumDstReg, PartDstReg, Offset); in fewerElementsVectorBasic() 2406 MIRBuilder.buildInsert(DstReg, AccumDstReg, PartDstReg, BitsForNumParts); in fewerElementsVectorBasic() 3622 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalarInsert()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 252 B.buildInsert(BigReg, ImpDef.getReg(0), SrcReg, 0).getReg(0); in unpackRegsToOrigType()
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D | AMDGPULegalizerInfo.cpp | 1581 B.buildInsert(Dst, Vec, Ins, IdxVal.getValue() * EltTy.getSizeInBits()); in legalizeInsertVectorElt()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 850 MachineInstrBuilder buildInsert(Register Res, Register Src,
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/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 992 MachineInstrBuilder buildInsert(const DstOp &Res, const SrcOp &Src,
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPURegisterBankInfo.cpp | 1186 auto Ins0 = B.buildInsert(LoadTy, Undef, Load0, 0); in applyMappingLoad() 1187 B.buildInsert(MI.getOperand(0), Ins0, Load1, 64); in applyMappingLoad()
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D | AMDGPULegalizerInfo.cpp | 2135 B.buildInsert(Dst, Vec, Ins, IdxVal->Value * EltTy.getSizeInBits()); in legalizeInsertVectorElt()
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