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Searched refs:buildInstr (Results 1 – 25 of 54) sorted by relevance

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/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h370 MachineInstrBuilder buildInstr(unsigned Opcode) { in buildInstr() function
484 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1}); in buildPtrMask()
517 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1}); in buildUAddo()
523 return buildInstr(TargetOpcode::G_USUBO, {Res, CarryOut}, {Op0, Op1}); in buildUSubo()
529 return buildInstr(TargetOpcode::G_SADDO, {Res, CarryOut}, {Op0, Op1}); in buildSAddo()
535 return buildInstr(TargetOpcode::G_SSUBO, {Res, CarryOut}, {Op0, Op1}); in buildSSubo()
555 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
563 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut}, in buildUSube()
571 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut}, in buildSAdde()
579 return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut}, in buildSSube()
[all …]
DConstantFoldingMIRBuilder.h28 MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
69 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps);
/external/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp59 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty) { in buildInstr() function in MachineIRBuilder
72 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr() function in MachineIRBuilder
74 return buildInstr(Opcode, nullptr, Res, Op0, Op1); in buildInstr()
77 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr() function in MachineIRBuilder
80 MachineInstr *NewMI = buildInstr(Opcode, Ty); in buildInstr()
88 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr() function in MachineIRBuilder
90 MachineInstr *NewMI = buildInstr(Opcode, nullptr); in buildInstr()
95 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode) { in buildInstr() function in MachineIRBuilder
96 return buildInstr(Opcode, nullptr); in buildInstr()
99 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr() function in MachineIRBuilder
[all …]
DIRTranslator.cpp72 MIRBuilder.buildInstr(Opcode, Inst.getType(), Res, Op0, Op1); in translateBinaryOp()
91 MIRBuilder.buildInstr(TargetOpcode::G_BR, BrTgt.getType(), TgtBB); in translateBr()
/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/
DCSETest.cpp22 auto MIBInput = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[0]}); in TEST_F()
23 auto MIBInput1 = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[1]}); in TEST_F()
24 auto MIBAdd = B.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput}); in TEST_F()
34 CSEB.buildInstr(TargetOpcode::G_ADD, {AddReg}, {MIBInput, MIBInput}); in TEST_F()
37 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput}); in TEST_F()
40 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput}); in TEST_F()
43 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput1}); in TEST_F()
51 auto MIBCF1 = CSEB.buildInstr(TargetOpcode::G_ADD, {s32}, {MIBCst, MIBCst}); in TEST_F()
93 auto NonCSEFMul = RegularBuilder.buildInstr(TargetOpcode::G_AND) in TEST_F()
98 CSEB.buildInstr(TargetOpcode::G_AND, {s32}, {Copies[0], Copies[1]}); in TEST_F()
[all …]
DLegalizerHelperTest.cpp39 B.buildInstr(TargetOpcode::G_CTTZ, {LLT::scalar(32)}, {Copies[0]}); in TEST_F()
71 B.buildInstr(TargetOpcode::G_CTTZ, {LLT::scalar(64)}, {Copies[0]}); in TEST_F()
105 B.buildInstr(TargetOpcode::G_CTLZ, {LLT::scalar(32)}, {Copies[0]}); in TEST_F()
140 B.buildInstr(TargetOpcode::G_CTTZ, {LLT::scalar(32)}, {Copies[0]}); in TEST_F()
175 B.buildInstr(TargetOpcode::G_CTTZ, {LLT::scalar(64)}, {Copies[0]}); in TEST_F()
211 auto MIBCTPOP = B.buildInstr(TargetOpcode::G_CTPOP, {s16}, {MIBTrunc}); in TEST_F()
244 auto MIBCTPOP = B.buildInstr(TargetOpcode::G_CTPOP, {s32}, {MIBTrunc}); in TEST_F()
272 auto MIBCTTZ = B.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, in TEST_F()
300 B.buildInstr(TargetOpcode::G_CTLZ, {LLT::scalar(64)}, {Copies[0]}); in TEST_F()
331 B.buildInstr(TargetOpcode::G_CTLZ, {LLT::scalar(32)}, {Copies[0]}); in TEST_F()
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DConstantFoldingTest.cpp35 CFB.buildInstr(TargetOpcode::G_ADD, {s32}, in TEST_F()
47 CFB1.buildInstr(TargetOpcode::G_SUB, {s32}, in TEST_F()
55 CFB1.buildInstr(TargetOpcode::G_SEXT_INREG, {s32}, in TEST_F()
63 CFB1.buildInstr(TargetOpcode::G_SEXT_INREG, {s32}, in TEST_F()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h333 MachineInstrBuilder buildInstr(unsigned Opcode);
524 return buildInstr(TargetOpcode::G_FPEXT, {Res}, {Op}, Flags);
530 return buildInstr(TargetOpcode::G_PTRTOINT, {Dst}, {Src}); in buildPtrToInt()
535 return buildInstr(TargetOpcode::G_INTTOPTR, {Dst}, {Src}); in buildIntToPtr()
540 return buildInstr(TargetOpcode::G_BITCAST, {Dst}, {Src}); in buildBitcast()
545 return buildInstr(TargetOpcode::G_ADDRSPACE_CAST, {Dst}, {Src}); in buildAddrSpaceCast()
1229 return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
1246 return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);
1262 return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);
1268 return buildInstr(TargetOpcode::G_UMULH, {Dst}, {Src0, Src1}, Flags);
[all …]
DConstantFoldingMIRBuilder.h28 MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
69 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps);
DLegalizationArtifactCombiner.h74 Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc}); in tryCombineAnyExt()
159 Builder.buildInstr( in tryCombineSExt()
214 Builder.buildInstr(TargetOpcode::G_IMPLICIT_DEF, {DstReg}, {}); in tryFoldImplicitDef()
343 Builder.buildInstr(ConvertOp, {DstRegs[j]}, {TmpRegs[j]}); in tryCombineMerges()
386 Builder.buildInstr(ConvertOp, {DefReg}, {MergeSrc}); in tryCombineMerges()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp74 MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) { in buildInstr() function in MachineIRBuilder
123 return buildInstr(TargetOpcode::DBG_VALUE) in buildFIDbgValue()
138 auto MIB = buildInstr(TargetOpcode::DBG_VALUE); in buildConstDbgValue()
158 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel()
167 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc()
177 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex()
190 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue()
198 return buildInstr(TargetOpcode::G_JUMP_TABLE, {PtrTy}, {}) in buildJumpTable()
221 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}); in buildPtrAdd()
246 auto MIB = buildInstr(TargetOpcode::G_PTR_MASK); in buildPtrMask()
[all …]
DCSEMIRBuilder.cpp137 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr() function in CSEMIRBuilder
179 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
183 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
200 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
DLegalizerHelper.cpp768 MIRBuilder.buildInstr(TargetOpcode::G_USUBO, {DstReg, BorrowOut}, in narrowScalar()
776 MIRBuilder.buildInstr(TargetOpcode::G_USUBE, {DstReg, BorrowOut}, in narrowScalar()
824 MIRBuilder.buildInstr(ExtLoad) in narrowScalar()
929 MIRBuilder.buildInstr(TargetOpcode::G_PHI).addDef(DstRegs[i]); in narrowScalar()
1007 MIRBuilder.buildInstr(TargetOpcode::G_SEXT, {MO2.getReg()}, {DstExt}); in narrowScalar()
1055 .buildInstr(TargetOpcode::G_ASHR, {NarrowTy}, in narrowScalar()
1063 .buildInstr( in narrowScalar()
1089 auto DstPart = MIRBuilder.buildInstr(MI.getOpcode(), {NarrowTy}, in narrowScalar()
1106 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO.getReg()}); in widenScalarSrc()
1113 auto ExtB = MIRBuilder.buildInstr(TargetOpcode::G_TRUNC, {NarrowTy}, in narrowScalarSrc()
[all …]
DIRTranslator.cpp303 MIRBuilder.buildInstr(Opcode, {Res}, {Op0, Op1}, Flags); in translateBinaryOp()
319 MIRBuilder.buildInstr(TargetOpcode::G_FNEG, {Res}, {Op1}, Flags); in translateFSub()
333 MIRBuilder.buildInstr(TargetOpcode::G_FNEG, {Res}, {Op0}, Flags); in translateFNeg()
356 MIRBuilder.buildInstr(TargetOpcode::G_FCMP, {Res}, {Pred, Op0, Op1}, in translateCompare()
634 Cond = MIB.buildInstr(TargetOpcode::G_XOR, {i1Ty}, {Cond, True}, None) in emitSwitchCase()
1019 MIRBuilder.buildInstr(TargetOpcode::G_SELECT, {ResRegs[i]}, in translateSelect()
1050 MIRBuilder.buildInstr(Opcode, {Res}, {Op}); in translateCast()
1174 auto MIB = MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD); in getStackGuard()
1194 MIRBuilder.buildInstr(Op) in translateOverflowIntrinsic()
1280 MIRBuilder.buildInstr(Op, {getOrCreateVReg(CI)}, VRegs, in translateSimpleIntrinsic()
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/external/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h99 MachineInstr *buildInstr(unsigned Opcode, Type *Ty);
107 MachineInstr *buildInstr(unsigned Opcode, Type *Ty, MachineBasicBlock &BB);
115 MachineInstr *buildInstr(unsigned Opcode, Type *Ty, unsigned Res,
125 MachineInstr *buildInstr(unsigned Opcode, unsigned Res, unsigned Op0,
134 MachineInstr *buildInstr(unsigned Opcode, unsigned Res, unsigned Op0);
142 MachineInstr *buildInstr(unsigned Opcode);
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp85 return buildInstr(TargetOpcode::DBG_VALUE) in buildFIDbgValue()
121 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel()
130 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc()
140 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex()
153 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue()
161 return buildInstr(TargetOpcode::G_JUMP_TABLE, {PtrTy}, {}) in buildJumpTable()
189 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}); in buildPtrAdd()
219 return buildInstr(TargetOpcode::G_BR).addMBB(&Dest); in buildBr()
224 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
232 return buildInstr(TargetOpcode::G_BRJT) in buildBrJT()
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DCSEMIRBuilder.cpp167 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr() function in CSEMIRBuilder
209 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
213 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
230 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
/external/llvm/lib/Target/AArch64/
DAArch64CallLowering.cpp34 MachineInstr *Return = MIRBuilder.buildInstr(AArch64::RET_ReallyLR); in lowerReturn()
46 MIRBuilder.buildInstr(TargetOpcode::COPY, ResReg, VReg); in lowerReturn()
85 MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg()); in lowerFormalArguments()
/external/llvm-project/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp784 MIB.buildInstr(TargetOpcode::COPY, {To}, {}).addReg(SrcReg, 0, SubReg); in copySubReg()
1028 auto FCSel = MIB.buildInstr(Opc, {Dst}, {True, False}).addImm(CC); in emitSelect()
1175 auto SelectInst = MIB.buildInstr(Opc, {Dst}, {True, False}).addImm(CC); in emitSelect()
1413 MIB.buildInstr(Opc).addReg(TestReg).addImm(Bit).addMBB(DstMBB); in emitTestBit()
1472 auto BranchMI = MIB.buildInstr(Opc, {}, {CompareReg}).addMBB(DestMBB); in emitCBZ()
1489 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC1).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1491 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC2).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1595 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC).addMBB(DestMBB); in selectCompareBranchFedByICmp()
1630 MIB.buildInstr(AArch64::ANDSWri, {LLT::scalar(32)}, {CondReg}).addImm(1); in selectCompareBranch()
1632 auto Bcc = MIB.buildInstr(AArch64::Bcc) in selectCompareBranch()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp627 auto SubRegCopy = MIB.buildInstr(TargetOpcode::COPY, {To}, {}) in selectSubregisterCopy()
1006 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC).addMBB(DestMBB); in selectCompareBranch()
1125 auto Shl = MIB.buildInstr(Opc, {DstReg}, {Src1Reg}); in selectVectorSHL()
1171 auto Neg = MIB.buildInstr(NegOpc, {RC}, {Src2Reg}); in selectVectorASHR()
1173 auto SShl = MIB.buildInstr(Opc, {DstReg}, {Src1Reg, Neg}); in selectVectorASHR()
1218 auto MovZ = MIB.buildInstr(AArch64::MOVZXi, {&AArch64::GPR64RegClass}, {}); in materializeLargeCMVal()
1230 auto MovI = MIB.buildInstr(AArch64::MOVKXi).addDef(DstReg).addUse(SrcReg); in materializeLargeCMVal()
1279 auto Trunc = MIB.buildInstr(TargetOpcode::COPY, {SrcTy}, {}) in preISelLower()
1317 MIB.buildInstr(Is64Bit ? AArch64::UBFMXri : AArch64::UBFMWri, in earlySelectSHL()
1726 MIB.buildInstr(TargetOpcode::COPY, {I.getOperand(0).getReg()}, {}) in select()
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUPostLegalizerCombiner.cpp114 B.buildInstr(Opc, {MI.getOperand(0)}, {X, Y}, MI.getFlags()); in applySelectFCmpToFMinToFMaxLegacy()
191 B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {DstReg}, in applyUCharToFloat()
194 auto Cvt0 = B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {S32}, in applyUCharToFloat()
244 B.buildInstr(NewOpc, {MI.getOperand(0)}, {CvtSrc}, MI.getFlags()); in applyCvtF32UByteN()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsLegalizerInfo.cpp291 MachineInstrBuilder Bitcast = MIRBuilder.buildInstr( in legalizeCustom()
321 if (!MIRBuilder.buildInstr(Opcode) in SelectMSA3OpIntrinsic()
336 MIRBuilder.buildInstr(Opcode) in MSA3OpIntrinsicToGeneric()
348 MIRBuilder.buildInstr(Opcode) in MSA2OpIntrinsicToGeneric()
375 MachineInstr *Trap = MIRBuilder.buildInstr(Mips::TRAP); in legalizeIntrinsic()
DMipsInstructionSelector.cpp144 B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
150 MachineInstr *Inst = B.buildInstr(Mips::LUi, {DestReg}, {}) in materialize32BitImm()
157 B.buildInstr(Mips::ADDiu, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
163 MachineInstr *LUi = B.buildInstr(Mips::LUi, {LUiReg}, {}) in materialize32BitImm()
165 MachineInstr *ORi = B.buildInstr(Mips::ORi, {DestReg}, {LUiReg}) in materialize32BitImm()
505 B.buildInstr(Mips::MTC1, {I.getOperand(0).getReg()}, {GPRReg}); in select()
518 MachineInstrBuilder PairF64 = B.buildInstr( in select()
707 MachineInstrBuilder MIB = B.buildInstr( in select()
DMipsCallLowering.cpp147 .buildInstr(STI.isFP64bit() ? Mips::BuildPairF64_64 in assignValueToReg()
157 MIRBuilder.buildInstr(Mips::MTC1) in assignValueToReg()
259 .buildInstr(STI.isFP64bit() ? Mips::ExtractElementF64_64 in assignValueToReg()
267 .buildInstr(STI.isFP64bit() ? Mips::ExtractElementF64_64 in assignValueToReg()
275 MIRBuilder.buildInstr(Mips::MFC1) in assignValueToReg()
564 MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN); in lowerCall()
667 MIRBuilder.buildInstr(Mips::ADJCALLSTACKUP).addImm(NextStackOffset).addImm(0); in lowerCall()
/external/llvm-project/llvm/lib/Target/PowerPC/GISel/
DPPCCallLowering.cpp34 MIRBuilder.buildInstr(PPC::BLR8); in lowerReturn()

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