Searched refs:buildOr (Results 1 – 11 of 11) sorted by relevance
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 1121 MachineInstrBuilder Or = MIRBuilder.buildOr(NarrowTy, XorL, XorH); in narrowScalar() 1422 MIRBuilder.buildOr(NextResult, ResultReg, Shl); in widenScalarMergeValues() 1868 MIBSrc = MIRBuilder.buildOr( in widenScalar() 2573 return B.buildOr(TargetTy, MaskedOldElt, ShiftedInsertVal).getReg(0); in buildBitFieldInsert() 2700 auto Or = MIRBuilder.buildOr(AnyExtTy, Shift, LargeLoad); in lowerLoad() 4105 Hi = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 4124 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 4147 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 4217 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift() 4238 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift() [all …]
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 971 MachineInstrBuilder Or = MIRBuilder.buildOr(NarrowTy, XorL, XorH); in narrowScalar() 1214 MIRBuilder.buildOr(NextResult, ResultReg, Shl); in widenScalarMergeValues() 1323 WideSrc = MIRBuilder.buildOr(NewSrcTy, WideSrc, Shl); in widenScalarUnmergeValues() 1492 MIBSrc = MIRBuilder.buildOr( in widenScalar() 2126 auto Or = MIRBuilder.buildOr(AnyExtTy, Shift, LargeLoad); in lower() 3119 Hi = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 3138 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 3161 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS); in narrowScalarShiftByConstant() 3231 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift() 3252 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); in narrowScalarShift() [all …]
|
/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMLegalizerInfo.cpp | 455 MIRBuilder.buildOr(OriginalResult, Results[0], Results[1]); in legalizeCustom()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMLegalizerInfo.cpp | 457 MIRBuilder.buildOr(OriginalResult, Results[0], Results[1]); in legalizeCustom()
|
/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
D | PatternMatchTest.cpp | 124 auto MIBOr = B.buildOr(s64, Copies[0], Copies[1]); in TEST_F()
|
D | LegalizerHelperTest.cpp | 2698 auto Or = B.buildOr(V4S8, Val0, Val1); in TEST_F()
|
/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 1064 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y; in passSpecialInputs() 1073 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z; in passSpecialInputs()
|
D | AMDGPURegisterBankInfo.cpp | 1573 auto MergedInputs = B.buildOr(S32, ClampOffset, ShiftWidth); in applyMappingBFEIntrinsic() 2676 auto Or = B.buildOr(S32, ZextLo, ShiftHi); in applyMappingImpl()
|
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 1327 MachineInstrBuilder buildOr(const DstOp &Dst, const SrcOp &Src0, in buildOr() function
|
/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 1498 MachineInstrBuilder buildOr(const DstOp &Dst, const SrcOp &Src0, in buildOr() function
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPURegisterBankInfo.cpp | 1925 auto Or = B.buildOr(S32, ZextLo, ShiftHi); in applyMappingImpl()
|