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Searched refs:buildSExtOrTrunc (Results 1 – 9 of 9) sorted by relevance

/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizationArtifactCombiner.h122 auto Extended = SextSrc ? Builder.buildSExtOrTrunc(DstTy, SextSrc) : in tryCombineZExt()
DMachineIRBuilder.h676 MachineInstrBuilder buildSExtOrTrunc(const DstOp &Res, const SrcOp &Op);
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h579 MachineInstrBuilder buildSExtOrTrunc(const DstOp &Res, const SrcOp &Op);
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DIRTranslator.cpp1095 IdxReg = MIRBuilder.buildSExtOrTrunc(OffsetTy, IdxReg).getReg(0); in translateGetElementPtr()
1928 Idx = MIRBuilder.buildSExtOrTrunc(VecIdxTy, Idx)->getOperand(0).getReg(); in translateExtractElement()
DMachineIRBuilder.cpp467 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(const DstOp &Res, in buildSExtOrTrunc() function in MachineIRBuilder
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp462 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(const DstOp &Res, in buildSExtOrTrunc() function in MachineIRBuilder
DIRTranslator.cpp1518 IdxReg = MIRBuilder.buildSExtOrTrunc(OffsetTy, IdxReg).getReg(0); in translateGetElementPtr()
2573 Idx = MIRBuilder.buildSExtOrTrunc(VecIdxTy, Idx).getReg(0); in translateExtractElement()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp1797 B.buildSExtOrTrunc(DefRegs[0], SrcReg); in applyMappingImpl()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp2565 B.buildSExtOrTrunc(DefRegs[0], SrcReg); in applyMappingImpl()