| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | LegalizerHelperTest.cpp | 210 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
243 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
363 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
405 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
440 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
476 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
509 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
543 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
577 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
616 auto MIBTrunc = B.buildTrunc(s8, Copies[0]); in TEST_F()
[all …]
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| D | PatternMatchTest.cpp | 133 auto TruncCopy1 = B.buildTrunc(s32, Copies[1]); in TEST_F()
270 auto MIBTrunc = B.buildTrunc(s32, Copies[0]); in TEST_F()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 102 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
111 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
561 B.buildTrunc(OrigRegs[0], BV); in packSplitRegsToOrigType()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 275 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
286 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 273 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
284 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 385 MIRBuilder.buildTrunc(DstReg, Remerge); in buildWidenedRemergeToDst()
996 MIRBuilder.buildTrunc(TmpReg, SrcReg); in narrowScalar()
1149 auto TruncMIB = MIRBuilder.buildTrunc(NarrowTy, MO1); in narrowScalar()
1311 auto ExtB = MIRBuilder.buildTrunc(NarrowTy, MO); in narrowScalarSrc()
1427 MIRBuilder.buildTrunc(DstReg, ResultReg); in widenScalarMergeValues()
1498 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0)); in widenScalarMergeValues()
1581 MIRBuilder.buildTrunc(Dst0Reg, SrcReg); in widenScalarUnmergeValues()
1585 MIRBuilder.buildTrunc(MI.getOperand(I), Shr); in widenScalarUnmergeValues()
1700 MIRBuilder.buildTrunc(DstReg, in widenScalarExtract()
1715 MIRBuilder.buildTrunc(DstReg, LShr); in widenScalarExtract()
[all …]
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| D | CombinerHelper.cpp | 471 MachineInstr *NewMI = Builder.buildTrunc(NewDstReg, ChosenDstReg); in applyCombineExtendingLoads()
1147 Value = MIB.buildTrunc(Ty, MemSetValue).getReg(0); in optimizeMemset()
1939 auto MIB = Builder.buildTrunc(LLT::scalar(Dst0Ty.getSizeInBits()), SrcReg); in applyCombineUnmergeWithDeadLanesToTrunc()
1942 Builder.buildTrunc(Dst0Reg, SrcReg); in applyCombineUnmergeWithDeadLanesToTrunc()
2362 Builder.buildTrunc(DstReg, SrcReg); in applyCombineTruncOfExt()
2402 auto TruncShiftSrc = Builder.buildTrunc(DstTy, ShiftSrc); in applyCombineTruncOfShl()
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| D | CallLowering.cpp | 413 MIRBuilder.buildTrunc(ArgReg, {NewReg}).getReg(0); in handleAssignments()
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| D | InlineAsmLowering.cpp | 632 MIRBuilder.buildTrunc(ResRegs[i], Tmp1Reg); in lowerInlineAsm()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 317 MIRBuilder.buildTrunc(ValVReg, LoadVReg); in assignValueToAddress()
354 MIRBuilder.buildTrunc(ValVReg, PhysRegToVReg); in assignValueToReg()
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| D | ARMLegalizerInfo.cpp | 443 MIRBuilder.buildTrunc(ProcessedResult, LibcallResult); in legalizeCustom()
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 247 Builder.buildTrunc(DstReg, MergeSrcReg); in tryCombineTrunc()
293 Builder.buildTrunc(DstReg, TruncSrc); in tryCombineTrunc()
385 Builder.buildTrunc(DefReg, NewUnmerge.getReg(I)); in tryFoldUnmergeCast()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 855 MIRBuilder.buildTrunc(TmpReg, SrcReg); in narrowScalar()
1001 auto TruncMIB = MIRBuilder.buildTrunc(NarrowTy, MO1.getReg()); in narrowScalar()
1219 MIRBuilder.buildTrunc(DstReg, ResultReg); in widenScalarMergeValues()
1290 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0)); in widenScalarMergeValues()
1369 MIRBuilder.buildTrunc(DstReg, in widenScalarExtract()
1385 MIRBuilder.buildTrunc(DstReg, LShr); in widenScalarExtract()
1465 MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), NewOp); in widenScalar()
1533 MIRBuilder.buildTrunc(DstReg, ShrReg); in widenScalar()
1551 MIRBuilder.buildTrunc(DstReg, Shift); in widenScalar()
2127 MIRBuilder.buildTrunc(DstReg, {Or.getReg(0)}); in lower()
[all …]
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| D | CallLowering.cpp | 344 MIRBuilder.buildTrunc(ArgReg, {NewReg}).getReg(0); in handleAssignments()
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| D | CombinerHelper.cpp | 473 MachineInstr *NewMI = Builder.buildTrunc(NewDstReg, ChosenDstReg); in applyCombineExtendingLoads()
1049 Value = MIB.buildTrunc(Ty, MemSetValue).getReg(0); in optimizeMemset()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsLegalizerInfo.cpp | 402 MIRBuilder.buildTrunc(Val, Load.getReg(0)); in legalizeCustom()
416 MIRBuilder.buildTrunc(Val, Merge); in legalizeCustom()
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| D | MipsCallLowering.cpp | 160 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
196 MIRBuilder.buildTrunc(ValVReg, Load); in assignValueToAddress()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 323 MIRBuilder.buildTrunc(ValVReg, LoadVReg); in assignValueToAddress()
360 MIRBuilder.buildTrunc(ValVReg, PhysRegToVReg); in assignValueToReg()
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| D | ARMLegalizerInfo.cpp | 444 MIRBuilder.buildTrunc(ProcessedResult, LibcallResult); in legalizeCustom()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 127 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
136 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
720 B.buildTrunc(OrigRegs[0], Widened); in packSplitRegsToOrigType()
773 B.buildTrunc(OrigRegs[0], BV); in packSplitRegsToOrigType()
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| D | AMDGPULegalizerInfo.cpp | 2418 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
3801 B.buildTrunc(Dst, LoadDstReg); in legalizeBufferLoad()
3808 Repack.push_back(B.buildTrunc(EltTy, Unmerge.getReg(I)).getReg(0)); in legalizeBufferLoad()
4362 B.buildTrunc(DstReg, ResultRegs[0]); in legalizeImageIntrinsic()
4385 Reg = B.buildTrunc(S16, Reg).getReg(0); in legalizeImageIntrinsic()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 169 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
208 MIRBuilder.buildTrunc(ValVReg, LoadReg); in assignValueToAddress()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 892 MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 82 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 759 SplitSrcs[I] = MIRBuilder.buildTrunc(InterTy, SplitSrcs[I]).getReg(0); in legalizeVectorTrunc()
|