Searched refs:buildUAdde (Results 1 – 7 of 7) sorted by relevance
| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | MachineIRBuilderTest.cpp | 381 B.buildUAdde(S64, S1, Copies[0], Copies[1], UAddo.getReg(1)); in TEST_F()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 487 MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut,
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 552 MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut, in buildUAdde() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 400 MachineInstrBuilder MachineIRBuilder::buildUAdde(const DstOp &Res, in buildUAdde() function in MachineIRBuilder
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| D | LegalizerHelper.cpp | 739 MIRBuilder.buildUAdde(DstReg, CarryOut, Src1Regs[i], in narrowScalar()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 2892 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUDIV_UREM64Impl()
2905 B.buildUAdde(S32, S1, Add1_HiNc, MulHi2_Hi, Add1_Lo.getReg(1)); in legalizeUDIV_UREM64Impl()
2906 auto Add2_Hi = B.buildUAdde(S32, S1, Add2_HiC, Zero32, Add2_Lo.getReg(1)); in legalizeUDIV_UREM64Impl()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 886 MIRBuilder.buildUAdde(DstReg, CarryOut, Src1Regs[i], in narrowScalar()
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