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Searched refs:buildUAddo (Results 1 – 7 of 7) sorted by relevance

/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/
DMachineIRBuilderTest.cpp376 auto UAddo = B.buildUAddo(S64, S1, Copies[0], Copies[1]); in TEST_F()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h470 MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut,
/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h515 MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut, in buildUAddo() function
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp393 MachineInstrBuilder MachineIRBuilder::buildUAddo(const DstOp &Res, in buildUAddo() function in MachineIRBuilder
DLegalizerHelper.cpp737 MIRBuilder.buildUAddo(DstReg, CarryOut, Src1Regs[i], Src2Regs[i]); in narrowScalar()
3438 B.buildUAddo(NarrowTy, LLT::scalar(1), Factors[0], Factors[1]); in multiplyRegisters()
3443 B.buildUAddo(NarrowTy, LLT::scalar(1), FactorSum, Factors[i]); in multiplyRegisters()
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp884 MIRBuilder.buildUAddo(DstReg, CarryOut, Src1Regs[i], Src2Regs[i]); in narrowScalar()
4424 B.buildUAddo(NarrowTy, LLT::scalar(1), Factors[0], Factors[1]); in multiplyRegisters()
4429 B.buildUAddo(NarrowTy, LLT::scalar(1), FactorSum, Factors[i]); in multiplyRegisters()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp2891 auto Add1_Lo = B.buildUAddo(S32, S1, RcpLo, MulHi1_Lo); in legalizeUDIV_UREM64Impl()
2903 auto Add2_Lo = B.buildUAddo(S32, S1, Add1_Lo, MulHi2_Lo); in legalizeUDIV_UREM64Impl()