Searched refs:buildXor (Results 1 – 10 of 10) sorted by relevance
| /external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
| D | PatternMatchTest.cpp | 479 auto NotInst1 = B.buildXor(s64, Copies[0], AllOnes); in TEST_F()
487 auto NotInst2 = B.buildXor(s64, AllOnes, Copies[1]); in TEST_F()
493 auto WrongCst = B.buildXor(s64, Copies[0], FortyTwo); in TEST_F()
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| D | MachineIRBuilderTest.cpp | 196 B.buildXor(S64, Copies[0], Copies[1]); in TEST_F()
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| D | LegalizerHelperTest.cpp | 2699 auto Xor = B.buildXor(V4S8, Val0, Val1); in TEST_F()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 1119 MachineInstrBuilder XorL = MIRBuilder.buildXor(NarrowTy, LHSL, RHSL); in narrowScalar()
1120 MachineInstrBuilder XorH = MIRBuilder.buildXor(NarrowTy, LHSH, RHSH); in narrowScalar()
2923 MIRBuilder.buildXor(Res, SubByReg, SignMask); in lower()
3135 MIRBuilder.buildXor(MI.getOperand(0).getReg(), Add, Shift); in lower()
4922 auto MIBNot = MIRBuilder.buildXor(SrcTy, SrcReg, MIBCstNeg1); in lowerBitCount()
5112 auto Xor = MIRBuilder.buildXor(S64, LPlusS, S); in lowerSITOFP()
5157 MachineInstrBuilder Res = MIRBuilder.buildXor(DstTy, ResLowBits, ResHighBit); in lowerFPTOUI()
5221 auto XorSign = MIRBuilder.buildXor(DstTy, R, Sign); in lowerFPTOSI()
5899 MIRBuilder.buildXor(Dst1, ConditionRHS, ResultLowerThanLHS); in lowerSADDO_SSUBO()
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| D | CombinerHelper.cpp | 929 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 1333 MachineInstrBuilder buildXor(const DstOp &Dst, const SrcOp &Src0, in buildXor() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 969 MachineInstrBuilder XorL = MIRBuilder.buildXor(NarrowTy, LHSL, RHSL); in narrowScalar()
970 MachineInstrBuilder XorH = MIRBuilder.buildXor(NarrowTy, LHSH, RHSH); in narrowScalar()
3956 auto Xor = MIRBuilder.buildXor(S64, LPlusS, S); in lowerSITOFP()
4001 MachineInstrBuilder Res = MIRBuilder.buildXor(DstTy, ResLowBits, ResHighBit); in lowerFPTOUI()
4390 MIRBuilder.buildXor(Dst1, ConditionRHS, ResultLowerThanLHS); in lowerSADDO_SSUBO()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 3026 LHS = B.buildXor(Ty, LHS, LHSign).getReg(0); in legalizeSDIV_SREM()
3027 RHS = B.buildXor(Ty, RHS, RHSign).getReg(0); in legalizeSDIV_SREM()
3037 Sign = B.buildXor(Ty, LHSign, RHSign).getReg(0); in legalizeSDIV_SREM()
3041 UDivRem = B.buildXor(Ty, UDivRem, Sign).getReg(0); in legalizeSDIV_SREM()
3293 Scale = B.buildXor(S1, CmpNum, CmpDen).getReg(0); in legalizeFDIV64()
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 1504 MachineInstrBuilder buildXor(const DstOp &Dst, const SrcOp &Src0, in buildXor() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.cpp | 2188 B.buildXor(Scale, CmpNum, CmpDen); in legalizeFDIV64()
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