| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nv30_state.c | 44 uint32_t blend[2], cmask[2]; in nv30_blend_state_create() local
65 cmask[0] = !!(cso->rt[0].colormask & PIPE_MASK_A) << 24 | in nv30_blend_state_create()
71 cmask[1] = 0; in nv30_blend_state_create()
74 cmask[1] |= !!(cso->rt[i].colormask & PIPE_MASK_A) << (0 + (i * 4)) | in nv30_blend_state_create()
81 cmask[1] = 0x00001110 * !!(cmask[0] & 0x01000000); in nv30_blend_state_create()
82 cmask[1] |= 0x00002220 * !!(cmask[0] & 0x00010000); in nv30_blend_state_create()
83 cmask[1] |= 0x00004440 * !!(cmask[0] & 0x00000100); in nv30_blend_state_create()
84 cmask[1] |= 0x00008880 * !!(cmask[0] & 0x00000001); in nv30_blend_state_create()
90 SB_DATA (so, cmask[1]); in nv30_blend_state_create()
114 SB_DATA (so, cmask[0]); in nv30_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_texture.c | 78 if (rdst->cmask.size && rdst->dirty_level_mask & (1 << dst_level)) { in r600_prepare_for_dma_blit()
90 if (rsrc->cmask.size && rsrc->dirty_level_mask & (1 << src_level)) in r600_prepare_for_dma_blit()
335 if (!rtex->cmask.size) in r600_texture_discard_cmask()
341 memset(&rtex->cmask, 0, sizeof(rtex->cmask)); in r600_texture_discard_cmask()
342 rtex->cmask.base_address_reg = rtex->resource.gpu_address >> 8; in r600_texture_discard_cmask()
423 rtex->cmask = new_tex->cmask; in r600_reallocate_texture_inplace()
434 assert(!rtex->cmask.size); in r600_reallocate_texture_inplace()
507 rtex->cmask.size) { in r600_texture_get_handle()
514 if (rtex->cmask.size) in r600_texture_get_handle()
707 r600_texture_get_cmask_info(rscreen, rtex, &rtex->cmask); in r600_texture_allocate_cmask()
[all …]
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| D | r600_blit.c | 394 assert(tex->cmask.size); in r600_decompress_color_textures()
418 assert(tex->cmask.size); in r600_decompress_color_images()
458 } else if (rtex->cmask.size) { in r600_decompress_subresource()
864 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) { in do_hardware_msaa_resolve()
972 if (!rtex->is_depth && rtex->cmask.size) { in r600_flush_resource()
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| D | r600_state.c | 958 if (rtex->cmask.size) { in r600_init_color_surface()
959 surf->cb_color_cmask = rtex->cmask.offset >> 8; in r600_init_color_surface()
960 surf->cb_color_mask |= S_028100_CMASK_BLOCK_MAX(rtex->cmask.slice_tile_max); in r600_init_color_surface()
976 struct r600_cmask_info cmask; in r600_init_color_surface() local
979 r600_texture_get_cmask_info(&rscreen->b, rtex, &cmask); in r600_init_color_surface()
984 rctx->dummy_cmask->b.b.width0 < cmask.size || in r600_init_color_surface()
985 rctx->dummy_cmask->buf->alignment % cmask.alignment != 0) { in r600_init_color_surface()
993 cmask.size, cmask.alignment); in r600_init_color_surface()
1002 memset(ptr, 0xCC, cmask.size); in r600_init_color_surface()
1028 surf->cb_color_mask = S_028100_CMASK_BLOCK_MAX(cmask.slice_tile_max) | in r600_init_color_surface()
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| D | r600_pipe_common.h | 218 struct r600_cmask_info cmask; member
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| D | evergreen_state.c | 1755 …radeon_emit(cs, rtex ? rtex->cmask.base_address_reg : image->cb_color_base); /* R_028C7C_CB_COLOR0… in evergreen_emit_image_state()
1756 radeon_emit(cs, rtex ? rtex->cmask.slice_tile_max : 0); /* R_028C80_CB_COLOR0_CMASK_SLICE */ in evergreen_emit_image_state()
1885 radeon_emit(cs, tex->cmask.base_address_reg); /* R_028C7C_CB_COLOR0_CMASK */ in evergreen_emit_framebuffer_state()
1886 radeon_emit(cs, tex->cmask.slice_tile_max); /* R_028C80_CB_COLOR0_CMASK_SLICE */ in evergreen_emit_framebuffer_state()
4210 if (!is_buffer && rtex->cmask.size) in evergreen_set_shader_images()
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| D | r600_state_common.c | 677 if (!is_buffer && rtex->cmask.size) { in r600_set_sampler_views()
727 if (rtex->cmask.size) { in r600_update_compressed_colortex_mask()
779 if (rtex->cmask.size) { in r600_update_compressed_colortex_mask_images()
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard_opt_dce.c | 87 unsigned cmask = mir_from_bytemask(rounded, type_size); in midgard_opt_dead_code_eliminate_block() local
89 ins->mask &= cmask; in midgard_opt_dead_code_eliminate_block()
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| D | mir.c | 266 unsigned cmask = 0; in mir_bytemask_of_read_components_single() local
270 cmask |= (1 << swizzle[c]); in mir_bytemask_of_read_components_single()
273 return pan_to_bytemask(bits, cmask); in mir_bytemask_of_read_components_single()
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| /external/mesa3d/src/panfrost/bifrost/ |
| D | bir.c | 137 unsigned cmask = (1 << bytes) - 1; in bi_bytemask_of_read_components() local
141 mask |= (cmask << (c * bytes)); in bi_bytemask_of_read_components()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_lower_alu.c | 152 … nir_ssa_def *cmask = nir_imm_intN_t(b, (1ull << (src0->bit_size / 2)) - 1, src0->bit_size); in lower_alu_instr() local
170 nir_ssa_def *src0l = nir_iand(b, src0, cmask); in lower_alu_instr()
171 nir_ssa_def *src1l = nir_iand(b, src1, cmask); in lower_alu_instr()
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| /external/mesa3d/src/broadcom/vulkan/ |
| D | v3dv_meta_copy.c | 780 VkColorComponentFlags cmask,
818 VkColorComponentFlags cmask = 0; /* All components */ in copy_image_to_buffer_blit() local
857 cmask = VK_COLOR_COMPONENT_R_BIT | in copy_image_to_buffer_blit()
1064 cmask, &cswizzle, in copy_image_to_buffer_blit()
2550 VkColorComponentFlags cmask = 0; /* Write all components */ in copy_buffer_to_image_blit() local
2580 cmask = VK_COLOR_COMPONENT_R_BIT | in copy_buffer_to_image_blit()
2599 cmask = VK_COLOR_COMPONENT_R_BIT; in copy_buffer_to_image_blit()
2787 cmask, NULL, in copy_buffer_to_image_blit()
3112 VkColorComponentFlags cmask, in get_blit_pipeline_cache_key() argument
3137 *p = cmask; in get_blit_pipeline_cache_key()
[all …]
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| /external/mesa3d/docs/relnotes/ |
| D | 20.1.9.rst | 126 - radv: initialize with expanded cmask if the destination layout needs it
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| D | 19.1.3.rst | 62 - radv: Handle cmask being disallowed by addrlib.
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| D | 20.2.0.rst | 874 - radv: Rely on ac_surface for avoiding cmask for linear images.
3215 - amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask
3716 - radeonsi: do not use cmask with encrypted texture
3963 - radv: initialize with expanded cmask if the destination layout needs it
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| D | 20.3.0.rst | 4040 - radv: initialize with expanded cmask if the destination layout needs it
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| /external/tinyalsa_new/src/ |
| D | pcm_plugin.c | 301 p->cmask |= 1 << (idx + SNDRV_PCM_HW_PARAM_FIRST_MASK); in pcm_plug_masks_refine()
368 p->cmask |= (1 << (idx + SNDRV_PCM_HW_PARAM_FIRST_INTERVAL)); in pcm_plug_interval_refine()
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| D | pcm.c | 254 p->cmask = 0; in param_init()
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| /external/tinyalsa/ |
| D | pcm_plugin.c | 284 p->cmask |= 1 << (idx + SNDRV_PCM_HW_PARAM_FIRST_MASK); in pcm_plug_masks_refine()
351 p->cmask |= (1 << (idx + SNDRV_PCM_HW_PARAM_FIRST_INTERVAL)); in pcm_plug_interval_refine()
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| D | pcm.c | 247 p->cmask = 0; in param_init()
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| /external/kernel-headers/original/uapi/sound/ |
| D | asound.h | 418 unsigned int cmask; /* R: changed masks */ member
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| /external/mesa3d/docs/ |
| D | envvars.rst | 629 enable TC-compat cmask for MSAA images
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 6090 unsigned cmask = plane_mask & VGPU10_OPERAND_4_COMPONENT_MASK_ALL; in emit_clip_distance_declarations() local
6092 VGPU10_NAME_CLIP_DISTANCE, cmask, TRUE, in emit_clip_distance_declarations()
6097 unsigned cmask = (plane_mask >> 4) & VGPU10_OPERAND_4_COMPONENT_MASK_ALL; in emit_clip_distance_declarations() local
6099 VGPU10_NAME_CLIP_DISTANCE, cmask, TRUE, in emit_clip_distance_declarations()
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| /external/neon_2_sse/ |
| D | NEON_2_SSE.h | 4239 …_NEON2SSE_ALIGN_16 static const uint16_t cmask[] = {0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000… in vqdmulhq_s16() local
4245 mask = _mm_cmpeq_epi16 (res, *(__m128i*)cmask); in vqdmulhq_s16()
4304 …_NEON2SSE_ALIGN_16 static const uint16_t cmask[] = {0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000… in vqrdmulhq_s16() local
4306 mask = _mm_cmpeq_epi16 (res, *(__m128i*)cmask); in vqrdmulhq_s16()
4995 …_NEON2SSE_ALIGN_16 static const uint32_t cmask[] = {0x80000000, 0x80000000, 0x80000000, 0x80000000… in vqdmlsl_s16() local
4998 mask = _mm_cmpeq_epi32 (res32, *(__m128i*)cmask); in vqdmlsl_s16()
5008 _NEON2SSE_ALIGN_16 static const uint64_t cmask[] = {0x8000000000000000, 0x8000000000000000}; in _NEON2SSE_PERFORMANCE_WARNING() local
5011 mask = _MM_CMPEQ_EPI64 (res64, *(__m128i*)cmask); in _NEON2SSE_PERFORMANCE_WARNING()
12766 …_NEON2SSE_ALIGN_16 static const uint32_t cmask[] = {0x80000000, 0x80000000, 0x80000000, 0x80000000… variable
12772 mask = _mm_cmpeq_epi32 (res, *(__m128i*)cmask);
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| /external/libabigail/tests/data/test-diff-filter/ |
| D | test-PR27569-v1.abi | 63116 …<var-decl name="cmask" type-id="f0981eeb" visibility="default" filepath="include/uapi/sound/asound…
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