| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_ra_coalesce.cpp | 44 void coalescer::add_edge(value* a, value* b, unsigned cost) { in add_edge()
49 void coalescer::create_chunk(value *v) { in create_chunk()
75 void coalescer::unify_chunks(ra_edge *e) { in unify_chunks()
111 bool coalescer::chunks_interference(ra_chunk *c1, ra_chunk *c2) { in chunks_interference()
138 void coalescer::build_chunks() { in build_chunks()
160 ra_constraint* coalescer::create_constraint(constraint_kind kind) { in create_constraint()
166 void coalescer::dump_edges() { in dump_edges()
180 void coalescer::dump_chunks() { in dump_chunks()
191 void coalescer::dump_constraint_queue() { in dump_constraint_queue()
201 void coalescer::dump_chunk(ra_chunk* c) { in dump_chunk()
[all …]
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| D | sb_shader.h | 189 class coalescer {
202 coalescer(shader &sh) : sh(sh), edges(), chunks(), constraints() {} in coalescer() function
203 ~coalescer();
288 coalescer coal;
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | regcoal-invalid-subrange-update.mir | 8 # For this specific test case, the coalescer is going to get rid
21 # When updating the live-ranges, the register coalescer actually
27 # The test case runs through the coalescer *and* the scheduler, just
29 # gets a chance to verify those. If we were to just run the coalescer,
42 # #2 is what produces the IR to be out-of-synce with what the reg coalescer
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| D | 2012-10-04-AAPCS-byval-align8.ll | 32 ; ldm is not formed when the coalescer failed to coalesce everything.
59 ; ldm is not formed when the coalescer failed to coalesce everything.
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| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | regcoal-undef-lane-4-rm-cp-commuting-def.mir | 8 # this copy. That's what the coalescer attempts.
10 # This used to produce an assertion failure in the coalescer,
49 ; The coalescer should have been able to swap the operands of
52 ; before the coalescer, now it is RHS.
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| D | regcoal-subranges-update-remat.mir | 4 # Check that when the register coalescer rematerializes a register to set
9 # - First, we need the register coalescer to rematerialize something.
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| /external/llvm/test/CodeGen/X86/ |
| D | 2009-08-06-inlineasm.ll | 5 ; FIXME: If the coalescer happens to coalesce %level.1 with the copy to EAX
7 ; once the coalescer fixes a virtual register to physical register we can't
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| D | 2011-03-09-Physreg-Coalescing.ll | 8 ; The coalescer can easily overallocate physical registers,
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| D | 2006-05-08-CoalesceSubRegClass.ll | 1 ; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
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| /external/llvm/test/CodeGen/ARM/ |
| D | 2012-10-04-AAPCS-byval-align8.ll | 31 ; ldm is not formed when the coalescer failed to coalesce everything.
58 ; ldm is not formed when the coalescer failed to coalesce everything.
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | 2009-08-06-inlineasm.ll | 5 ; FIXME: If the coalescer happens to coalesce %level.1 with the copy to EAX
7 ; once the coalescer fixes a virtual register to physical register we can't
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| D | 2011-03-09-Physreg-Coalescing.ll | 8 ; The coalescer can easily overallocate physical registers,
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| D | 2006-05-08-CoalesceSubRegClass.ll | 2 ; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
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| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | coalescer-removepartial-extend-undef-subrange.mir | 4 # The failure occurs when the coalescer tries to removePartialRedundency() on the
5 # "%2:vreg_64 = COPY %3" in bb.1. The coalescer tries to prune and extend each
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| D | coalescing_makes_lanes_undef.mir | 4 # Register coalescer is going to eliminate %2:sgpr_32 = COPY %1.sub0 from bb.1
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| D | reg-coalescer-sched-crash.ll | 4 ; The register coalescer introduces a verifier error which later
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| D | limit-coalesce.mir | 3 # Check that coalescer does not create wider register tuple than in source
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| /external/llvm-project/llvm/test/CodeGen/Hexagon/ |
| D | regalloc-liveout-undef.mir | 5 # user (register coalescer in this case), so that the verification will
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| D | regalloc-coal-fullreg-undef.mir | 3 # Make sure that the coalescer does not create a full definition with
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-dead-register-def-bug.ll | 4 ; When rematerializing through truncates, the coalescer may produce instructions
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-dead-register-def-bug.ll | 4 ; When rematerializing through truncates, the coalescer may produce instructions
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| /external/llvm/test/Transforms/LoopStrengthReduce/AArch64/ |
| D | lsr-memcpy.ll | 6 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
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| /external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/AArch64/ |
| D | lsr-memcpy.ll | 6 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | subreg-coalescer-undef-use.ll | 3 ; register coalescer because it is hidden with subregister insert/extract.
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| D | reg-coalescer-sched-crash.ll | 4 ; The register coalescer introduces a verifier error which later
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