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Searched refs:config_bits (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_emit.c106 (vc4->rasterizer->config_bits[0] | in vc4_emit_state()
107 vc4->zsa->config_bits[0]) & rasosm_mask_out); in vc4_emit_state()
109 vc4->rasterizer->config_bits[1] | in vc4_emit_state()
110 vc4->zsa->config_bits[1]); in vc4_emit_state()
112 (vc4->rasterizer->config_bits[2] | in vc4_emit_state()
113 vc4->zsa->config_bits[2]) & ez_enable_mask_out); in vc4_emit_state()
Dvc4_state.c109 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_FRONT; in vc4_create_rasterizer_state()
111 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK; in vc4_create_rasterizer_state()
121 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES; in vc4_create_rasterizer_state()
124 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET; in vc4_create_rasterizer_state()
133 so->config_bits[0] |= VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X; in vc4_create_rasterizer_state()
221 so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z_UPDATE; in vc4_create_depth_stencil_alpha_state()
225 so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE; in vc4_create_depth_stencil_alpha_state()
227 so->config_bits[1] |= (cso->depth.func << in vc4_create_depth_stencil_alpha_state()
240 so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z; in vc4_create_depth_stencil_alpha_state()
243 so->config_bits[1] |= (PIPE_FUNC_ALWAYS << in vc4_create_depth_stencil_alpha_state()
Dvc4_context.h403 uint8_t config_bits[V3D21_CONFIGURATION_BITS_length]; member
419 uint8_t config_bits[V3D21_CONFIGURATION_BITS_length]; member
/external/mesa3d/src/mesa/main/
Dtexcompress_astc.cpp1771 int config_bits; in calculate_remaining_bits() local
1774 config_bits = 29; in calculate_remaining_bits()
1776 config_bits = 25 + 3 * num_parts; in calculate_remaining_bits()
1778 config_bits = 17; in calculate_remaining_bits()
1782 config_bits += 2; in calculate_remaining_bits()
1784 remaining_bits = 128 - config_bits - weight_bits; in calculate_remaining_bits()