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Searched refs:cpu_context_t (Results 1 – 25 of 29) sorted by relevance

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/external/arm-trusted-firmware/lib/el3_runtime/aarch64/
Dcontext_mgmt.c65 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context()
345 cpu_context_t *ctx; in cm_init_context_by_index()
357 cpu_context_t *ctx; in cm_init_my_context()
373 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit()
592 cpu_context_t *ctx; in cm_el2_sysregs_context_save()
614 cpu_context_t *ctx; in cm_el2_sysregs_context_restore()
631 cpu_context_t *ctx; in cm_el1_sysregs_context_save()
648 cpu_context_t *ctx; in cm_el1_sysregs_context_restore()
669 cpu_context_t *ctx; in cm_set_elr_el3()
687 cpu_context_t *ctx; in cm_set_elr_spsr_el3()
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/external/arm-trusted-firmware/include/lib/el3_runtime/aarch64/
Dcontext.h436 } cpu_context_t; typedef
439 #define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
441 # define get_fpregs_ctx(h) (&((cpu_context_t *) h)->fpregs_ctx)
443 #define get_el1_sysregs_ctx(h) (&((cpu_context_t *) h)->el1_sysregs_ctx)
445 # define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
447 #define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
448 #define get_cve_2018_3639_ctx(h) (&((cpu_context_t *) h)->cve_2018_3639_ctx)
450 # define get_pauth_ctx(h) (&((cpu_context_t *) h)->pauth_ctx)
458 CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx), \
460 CASSERT(CTX_EL1_SYSREGS_OFFSET == __builtin_offsetof(cpu_context_t, el1_sysregs_ctx), \
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/external/arm-trusted-firmware/include/lib/el3_runtime/aarch32/
Dcontext.h55 } cpu_context_t; typedef
58 #define get_regs_ctx(h) (&((cpu_context_t *) h)->regs_ctx)
65 CASSERT(CTX_REGS_OFFSET == __builtin_offsetof(cpu_context_t, regs_ctx), \
/external/arm-trusted-firmware/lib/el3_runtime/aarch32/
Dcontext_mgmt.c54 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context()
150 cpu_context_t *ctx; in cm_init_context_by_index()
162 cpu_context_t *ctx; in cm_init_my_context()
178 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit()
/external/arm-trusted-firmware/bl1/aarch32/
Dbl1_context_mgmt.c22 static cpu_context_t bl1_cpu_context[2];
96 sizeof(cpu_context_t)); in flush_smc_and_cpu_ctx()
147 cpu_context_t *ctx = cm_get_context(security_state); in bl1_prepare_next_image()
/external/arm-trusted-firmware/services/std_svc/sdei/
Dsdei_intr_mgmt.c221 static cpu_context_t *restore_and_resume_ns_context(void) in restore_and_resume_ns_context()
223 cpu_context_t *ns_ctx; in restore_and_resume_ns_context()
239 cpu_context_t *ctx, jmp_buf *dispatch_jmp) in setup_ns_dispatch()
344 cpu_context_t *ctx; in sdei_intr_handler()
529 cpu_context_t *ns_ctx; in sdei_dispatch_event()
608 cpu_context_t *ctx; in sdei_event_complete()
Dsdei_private.h166 cpu_context_t *ns_ctx = cm_get_context(NON_SECURE); in sdei_client_el()
/external/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_fiq_glue.c42 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_interrupt_handler()
129 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_get_intr_context()
/external/arm-trusted-firmware/docs/getting_started/
Dpsci-lib-integration-guide.rst39 #. Get the non-secure ``cpu_context_t`` for the current CPU by calling
80 ``cpu_context_t`` data structure. The initialization of other non-secure CPU
90 use the same ``cpu_context_t`` data structure for PSCI CPU context management
95 ``cpu_context_t`` is stripped down for just PSCI CPU context management.
98 is expected that the EL3 Runtime Software will query the ``cpu_context_t`` and
104 Runtime Software. Using ``cpu_context_t`` as an intermediary data store
109 information) for exit into non-secure world. Using ``cpu_context_t`` as an
113 Currently the ``cpu_context_t`` data structure for AArch32 stores the following
117 to CPU context ``cpu_context_t`` data and these are described in
137 The CPU context data 'cpu_context_t' is programmed to the registers differently
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/external/arm-trusted-firmware/plat/arm/common/aarch64/
Dexecution_state_switch.c45 cpu_context_t *ctx = (cpu_context_t *) handle; in arm_execution_state_switch()
/external/arm-trusted-firmware/bl32/sp_min/
Dsp_min_main.c128 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_prepare_next_image_entry()
211 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_warm_boot()
/external/arm-trusted-firmware/services/std_svc/spm_mm/
Dspm_mm_private.h47 cpu_context_t cpu_ctx;
Dspm_mm_setup.c27 cpu_context_t *ctx = &(sp_ctx->cpu_ctx); in spm_sp_setup()
Dspm_mm_main.c196 cpu_context_t *cpu_ctx = &(sp_ptr->cpu_ctx); in spm_mm_sp_call()
/external/arm-trusted-firmware/services/spd/tlkd/
Dtlkd_main.c61 cpu_context_t *s_cpu_context; in tlkd_interrupt_handler()
207 cpu_context_t *ns_cpu_context; in tlkd_smc_handler()
Dtlkd_private.h105 cpu_context_t cpu_ctx;
/external/arm-trusted-firmware/bl1/aarch64/
Dbl1_context_mgmt.c44 static cpu_context_t bl1_cpu_context[2]; in bl1_prepare_next_image()
/external/arm-trusted-firmware/services/std_svc/spmd/
Dspmd_private.h57 cpu_context_t cpu_ctx;
/external/arm-trusted-firmware/include/lib/el3_runtime/
Dcontext_mgmt.h35 void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep);
/external/arm-trusted-firmware/services/spd/opteed/
Dopteed_private.h131 cpu_context_t cpu_ctx;
Dopteed_main.c200 cpu_context_t *ns_cpu_context; in opteed_smc_handler()
/external/arm-trusted-firmware/services/spd/tspd/
Dtspd_main.c62 cpu_context_t *ns_cpu_context; in tspd_handle_sp_preemption()
287 cpu_context_t *ns_cpu_context; in tspd_smc_handler()
Dtspd_private.h187 cpu_context_t cpu_ctx;
/external/arm-trusted-firmware/lib/psci/
Dpsci_setup.c32 static cpu_context_t psci_ns_context[PLATFORM_CORE_COUNT];
/external/arm-trusted-firmware/bl31/
Dehf.c328 cpu_context_t *ns_ctx; in ehf_allow_ns_preemption()

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