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Searched refs:cpuinfo_get_l2_caches_count (Results 1 – 25 of 85) sorted by relevance

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/external/cpuinfo/test/mock/
Dscaleway.cc244 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
252 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
258 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
264 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
270 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
276 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
282 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
288 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dmoto-g-gen3.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-s3-us.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
502 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
508 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
515 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
521 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
527 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
533 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dmoto-e-gen1.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dmoto-g-gen1.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dlenovo-a6600-plus.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-win-duos.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-j1-2016.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dlg-optimus-g-pro.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
502 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
508 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
515 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
521 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
527 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
533 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dxperia-sl.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
502 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
508 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
515 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
521 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
527 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
533 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dnexus6.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dmoto-g-gen2.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Datm7029b-tablet.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-tab-3-7.0.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-tab-3-lite.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-grand-prime-value-edition.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dblu-r1-hd.cc490 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
498 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
504 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
510 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
517 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
523 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
529 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
535 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-s4-us.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
502 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
508 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
515 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
521 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
527 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
533 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dnexus-s.cc484 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
492 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
498 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
504 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
511 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
517 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
523 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
529 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dpadcod-10.1.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-s5-us.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
502 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
508 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
515 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
521 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
527 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
533 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dlg-k10-eu.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dnexus10.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dgalaxy-j5.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
Dnexus4.cc486 ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); in TEST()
494 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
500 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
506 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
513 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
519 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
525 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()
531 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { in TEST()

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