| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
| D | crc.s | 9 crc32cx w0, w1, x2 label
10 crc32cx w0, w0, x3 label
47 # M3-NEXT: 1 2 0.50 crc32cx w0, w1, x2
48 # M3-NEXT: 1 2 0.50 crc32cx w0, w0, x3
52 # M4-NEXT: 1 2 1.00 crc32cx w0, w1, x2
53 # M4-NEXT: 1 2 1.00 crc32cx w0, w0, x3
57 # M5-NEXT: 1 2 0.50 crc32cx w0, w1, x2
58 # M5-NEXT: 1 2 0.50 crc32cx w0, w0, x3
|
| /external/llvm/test/MC/AArch64/ |
| D | directive-cpu.s | 25 crc32cx w0, w1, x3
29 crc32cx w0, w1, x3
|
| D | cyclone-crc.s | 19 crc32cx w19, w23, x29
27 CHECK: crc32cx w19, w23, x29
|
| D | arm64-basic-a64-instructions.s | 10 crc32cx w18, w16, xzr
|
| D | basic-a64-instructions.s | 1506 crc32cx w18, w16, xzr
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 59 ; CHECK: crc32cx w0, w0, x1
60 %val = call i32 @llvm.aarch64.crc32cx(i32 %cur, i64 %next)
72 declare i32 @llvm.aarch64.crc32cx(i32, i64)
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 58 ; CHECK: crc32cx w0, w0, x1
59 %val = call i32 @llvm.aarch64.crc32cx(i32 %cur, i64 %next)
71 declare i32 @llvm.aarch64.crc32cx(i32, i64)
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-basic-a64-instructions.s | 10 crc32cx w18, w16, xzr
|
| D | crc.s | 38 crc32cx w19, w23, x29
|
| D | directives-case_insensitive.s | 8 crc32cx w0, w1, x3 label
|
| D | directive-cpu.s | 16 crc32cx w0, w1, x3 label
|
| D | directive-cpu-err.s | 24 crc32cx w0, w1, x3
|
| D | directive-arch_extension-negative.s | 8 crc32cx w0, w1, x3 label
|
| D | directive-arch_extension.s | 4 crc32cx w0, w1, x3 label
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-crc32.txt | 10 # CHECK: crc32cx w18, w16, xzr
|
| D | basic-a64-instructions.txt | 1052 # CHECK: crc32cx w18, w16, xzr
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-crc32.txt | 10 # CHECK: crc32cx w18, w16, xzr
|
| /external/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 58 declare i32 @llvm.arm.crc32cx(i32, i64)
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 58 declare i32 @llvm.arm.crc32cx(i32, i64)
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 641 TEST(crc32cx) { in TEST() argument
644 COMPARE(crc32cx(w7, w8, x9), "crc32cx w7, w8, x9"); in TEST()
645 COMPARE(crc32cx(w8, w19, x29), "crc32cx w8, w19, x29"); in TEST()
646 COMPARE(crc32cx(w18, w18, x4), "crc32cx w18, w18, x4"); in TEST()
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 577 0x12,0x5e,0xdf,0x9a = crc32cx w18, w16, xzr
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 958 void crc32cx(const Register& wd, const Register& wn, const Register& xm);
|
| D | assembler-aarch64.cc | 887 void Assembler::crc32cx(const Register& wd, in crc32cx() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 3471 crc32cx(rd, rn, rm); in Crc32cx()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 691 void crc32cx(const Register& wd, const Register& wn, const Register& xm)
|