| /external/llvm/test/MC/AArch64/ |
| D | cyclone-crc.s | 6 crc32x w3, w5, x20
14 CHECK: crc32x w3, w5, x20
|
| D | arm64-basic-a64-instructions.s | 6 crc32x w7, w9, x20
|
| D | basic-a64-instructions.s | 1502 crc32x w7, w9, x20
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 29 ; CHECK: crc32x w0, w0, x1
30 %val = call i32 @llvm.aarch64.crc32x(i32 %cur, i64 %next)
67 declare i32 @llvm.aarch64.crc32x(i32, i64)
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 28 ; CHECK: crc32x w0, w0, x1
29 %val = call i32 @llvm.aarch64.crc32x(i32 %cur, i64 %next)
66 declare i32 @llvm.aarch64.crc32x(i32, i64)
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-basic-a64-instructions.s | 6 crc32x w7, w9, x20
|
| D | crc.s | 19 crc32x w3, w5, x20
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-crc32.txt | 6 # CHECK: crc32x w7, w9, x20
|
| D | basic-a64-instructions.txt | 1048 # CHECK: crc32x w7, w9, x20
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-crc32.txt | 6 # CHECK: crc32x w7, w9, x20
|
| /external/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 53 declare i32 @llvm.arm.crc32x(i32, i64)
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 53 declare i32 @llvm.arm.crc32x(i32, i64)
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 597 TEST(crc32x) { in TEST() argument
600 COMPARE(crc32x(w3, w4, x5), "crc32x w3, w4, x5"); in TEST()
601 COMPARE(crc32x(w4, w15, x25), "crc32x w4, w15, x25"); in TEST()
602 COMPARE(crc32x(w14, w14, x30), "crc32x w14, w14, x30"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 2797 TEST_CRC32(crc32x_0, crc32x(w0, w1, x2))
|
| D | test-assembler-aarch64.cc | 12274 TEST(crc32x) { in TEST() argument
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 573 0x27,0x4d,0xd4,0x9a = crc32x w7, w9, x20
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 946 void crc32x(const Register& wd, const Register& wn, const Register& xm);
|
| D | assembler-aarch64.cc | 851 void Assembler::crc32x(const Register& wd, in crc32x() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 3451 crc32x(rd, rn, rm); in Crc32x()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 712 void crc32x(const Register& wd, const Register& wn, const Register& xm)
|
| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 901 { /* AArch64_CRC32Xrr, ARM64_INS_CRC32X: crc32x $rd, $rn, $rm */
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 804 def CRC32Xrr : BaseCRC32<1, 0b11, 0, GPR64, int_aarch64_crc32x, "crc32x">;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1545 def CRC32Xrr : BaseCRC32<1, 0b11, 0, GPR64, int_aarch64_crc32x, "crc32x">;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1394 def CRC32Xrr : BaseCRC32<1, 0b11, 0, GPR64, int_aarch64_crc32x, "crc32x">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12492 "crc32x\004csdb\004csel\004cset\005csetm\005csinc\005csinv\005csneg\007c"
13449 …{ 844 /* crc32x */, AArch64::CRC32Xrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasCRC, { MCK_GPR32,…
20822 …{ 844 /* crc32x */, AArch64::CRC32Xrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasCRC, { MCK_GPR32,…
|