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Searched refs:crn (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/clang/test/CodeGen/
Darm64-microsoft-status-reg.cpp16 #define ARM64_SYSREG(op0, op1, crn, crm, op2) \ argument
19 ((crn & 15) << 7) | \
/external/kernel-headers/original/uapi/linux/
Dvirtio_scsi.h49 __u8 crn; member
59 __u8 crn; member
/external/kernel-headers/original/uapi/asm-arm64/asm/
Dkvm.h220 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
224 ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td21 class AT<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
30 let Encoding{10-7} = crn;
80 class DC<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
89 let Encoding{10-7} = crn;
107 class IC<string name, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2,
115 let Encoding{10-7} = crn;
216 class TLBI<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
225 let Encoding{10-7} = crn;
269 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
278 let Encoding{10-7} = crn;
[all …]
/external/wpa_supplicant_8/wpa_supplicant/examples/
Ddpp-nfc.py352 crn = test_crn
355 crn = os.urandom(2)
356 hr = ndef.HandoverRequestRecord(version="1.4", crn=crn)
398 handover.my_crn, = struct.unpack('>H', crn)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td39 class AT<string name, bits<3> op1, bits<4> crn, bits<4> crm,
47 let Encoding{10-7} = crn;
100 class DC<string name, bits<3> op1, bits<4> crn, bits<4> crm,
108 let Encoding{10-7} = crn;
154 class IC<string name, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2,
162 let Encoding{10-7} = crn;
387 class TLBI<string name, bits<3> op1, bits<4> crn, bits<4> crm,
395 let Encoding{10-7} = crn;
511 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
520 let Encoding{10-7} = crn;
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td44 class AT<string name, bits<3> op1, bits<4> crn, bits<4> crm,
52 let Encoding{10-7} = crn;
105 class DC<string name, bits<3> op1, bits<4> crn, bits<4> crm,
113 let Encoding{10-7} = crn;
159 class IC<string name, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2,
167 let Encoding{10-7} = crn;
392 class TLBI<string name, bits<3> op1, bits<4> crn, bits<4> crm,
400 let Encoding{10-7} = crn;
516 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
525 let Encoding{10-7} = crn;
[all …]
/external/vixl/src/aarch64/
Dconstants-aarch64.h485 template<int op0, int op1, int crn, int crm, int op2>
491 (crn << CRn_offset) |
506 template<int op1, int crn, int crm, int op2>
511 (crn << CRn_offset) |
Dassembler-aarch64.cc1908 void Assembler::sys(int op1, int crn, int crm, int op2, const Register& xt) { in sys() argument
1910 Emit(SYS | ImmSysOp1(op1) | CRn(crn) | CRm(crm) | ImmSysOp2(op2) | Rt(xt)); in sys()
Dmacro-assembler-aarch64.h2132 void Sys(int op1, int crn, int crm, int op2, const Register& rt = xzr) {
2135 sys(op1, crn, crm, op2, rt);
Dassembler-aarch64.h2148 void sys(int op1, int crn, int crm, int op2, const Register& xt = xzr);
/external/capstone/arch/AArch64/
DARMMappingInsnOp.inc106 { /* ARM_CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
109 { /* ARM_CDP2, ARM_INS_CDP2: cdp2 $cop, $opc1, $crd, $crn, $crm, $opc2 */
442 { /* ARM_MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
445 { /* ARM_MCR2, ARM_INS_MCR2: mcr2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
484 { /* ARM_MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
487 { /* ARM_MRC2, ARM_INS_MRC2: mrc2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
5392 { /* ARM_t2CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
5395 { /* ARM_t2CDP2, ARM_INS_CDP2: cdp2${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
5707 { /* ARM_t2MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
5710 { /* ARM_t2MCR2, ARM_INS_MCR2: mcr2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
[all …]
/external/capstone/arch/ARM/
DARMMappingInsnOp.inc106 { /* ARM_CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
109 { /* ARM_CDP2, ARM_INS_CDP2: cdp2 $cop, $opc1, $crd, $crn, $crm, $opc2 */
442 { /* ARM_MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
445 { /* ARM_MCR2, ARM_INS_MCR2: mcr2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
484 { /* ARM_MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
487 { /* ARM_MRC2, ARM_INS_MRC2: mrc2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
5392 { /* ARM_t2CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
5395 { /* ARM_t2CDP2, ARM_INS_CDP2: cdp2${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
5707 { /* ARM_t2MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
5710 { /* ARM_t2MCR2, ARM_INS_MCR2: mcr2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
[all …]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md3047 System instruction with pre-encoded op (op1:crn:crm:op2).
3056 void sys(int op1, int crn, int crm, int op2, const Register& xt = xzr)
/external/cldr/tools/java/org/unicode/cldr/util/data/
Diso-639-3_Name_Index.tab1435 crn El Nayar Cora Cora, El Nayar
Diso-639-3.tab1383 crn I L El Nayar Cora
Dlanguage-subtag-registry8446 Subtag: crn