| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | gen6_constant_state.c | 298 const struct brw_cs_prog_data *cs_prog_data, in brw_upload_cs_push_constants() argument
303 (struct brw_stage_prog_data*) cs_prog_data; in brw_upload_cs_push_constants()
313 brw_cs_push_const_total_size(cs_prog_data, cs_params.threads); in brw_upload_cs_push_constants()
328 if (cs_prog_data->push.cross_thread.size > 0) { in brw_upload_cs_push_constants()
331 i < cs_prog_data->push.cross_thread.dwords; in brw_upload_cs_push_constants()
339 if (cs_prog_data->push.per_thread.size > 0) { in brw_upload_cs_push_constants()
342 8 * (cs_prog_data->push.per_thread.regs * t + in brw_upload_cs_push_constants()
343 cs_prog_data->push.cross_thread.regs); in brw_upload_cs_push_constants()
344 unsigned src = cs_prog_data->push.cross_thread.dwords; in brw_upload_cs_push_constants()
357 cs_prog_data->push.cross_thread.regs + in brw_upload_cs_push_constants()
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| D | brw_cs.c | 39 struct brw_cs_prog_data *cs_prog_data = in brw_cs_get_parameters() local
52 params.group_size = cs_prog_data->local_size[0] * in brw_cs_get_parameters()
53 cs_prog_data->local_size[1] * in brw_cs_get_parameters()
54 cs_prog_data->local_size[2]; in brw_cs_get_parameters()
59 cs_prog_data, params.group_size); in brw_cs_get_parameters()
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| D | brw_state.h | 277 const struct brw_cs_prog_data *cs_prog_data,
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| D | genX_state_upload.c | 4206 struct brw_cs_prog_data *cs_prog_data = local
4210 brw_upload_cs_push_constants(brw, cp, cs_prog_data, stage_state);
4271 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); local
4366 ALIGN(cs_prog_data->push.per_thread.regs * cs_params.threads +
4367 cs_prog_data->push.cross_thread.regs, 2);
4372 brw_cs_push_const_total_size(cs_prog_data, cs_params.threads);
4384 brw_cs_prog_data_prog_offset(cs_prog_data,
4393 .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
4397 .BarrierEnable = cs_prog_data->uses_barrier,
4400 cs_prog_data->push.cross_thread.regs,
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| D | brw_wm_surface_state.c | 1662 const struct brw_cs_prog_data *cs_prog_data = in brw_upload_cs_work_groups_surface() local
1665 if (prog && cs_prog_data->uses_num_work_groups) { in brw_upload_cs_work_groups_surface()
1667 cs_prog_data->binding_table.work_groups_start; in brw_upload_cs_work_groups_surface()
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| /external/mesa3d/src/intel/vulkan/ |
| D | anv_cmd_buffer.c | 1040 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); in anv_cmd_buffer_cs_push_constants() local
1045 brw_cs_push_const_total_size(cs_prog_data, cs_params.threads); in anv_cmd_buffer_cs_push_constants()
1061 if (cs_prog_data->push.cross_thread.size > 0) { in anv_cmd_buffer_cs_push_constants()
1062 memcpy(dst, src, cs_prog_data->push.cross_thread.size); in anv_cmd_buffer_cs_push_constants()
1063 dst += cs_prog_data->push.cross_thread.size; in anv_cmd_buffer_cs_push_constants()
1064 src += cs_prog_data->push.cross_thread.size; in anv_cmd_buffer_cs_push_constants()
1067 if (cs_prog_data->push.per_thread.size > 0) { in anv_cmd_buffer_cs_push_constants()
1069 memcpy(dst, src, cs_prog_data->push.per_thread.size); in anv_cmd_buffer_cs_push_constants()
1073 (range->start * 32 + cs_prog_data->push.cross_thread.size); in anv_cmd_buffer_cs_push_constants()
1076 dst += cs_prog_data->push.per_thread.size; in anv_cmd_buffer_cs_push_constants()
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| D | genX_pipeline.c | 2362 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
2364 anv_pipeline_setup_l3_config(&pipeline->base, cs_prog_data->base.total_shared > 0);
2371 ALIGN(cs_prog_data->push.per_thread.regs * cs_params.threads +
2372 cs_prog_data->push.cross_thread.regs, 2);
2425 brw_cs_prog_data_prog_offset(cs_prog_data, cs_params.simd_size),
2433 .BarrierEnable = cs_prog_data->uses_barrier,
2435 encode_slm_size(GEN_GEN, cs_prog_data->base.total_shared),
2440 .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
2443 cs_prog_data->push.cross_thread.regs,
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| D | anv_pipeline.c | 1815 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); in anv_cs_parameters() local
1819 cs_params.group_size = cs_prog_data->local_size[0] * in anv_cs_parameters()
1820 cs_prog_data->local_size[1] * in anv_cs_parameters()
1821 cs_prog_data->local_size[2]; in anv_cs_parameters()
1824 cs_prog_data, cs_params.group_size); in anv_cs_parameters()
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| /external/mesa3d/src/gallium/drivers/iris/ |
| D | iris_program.c | 1978 struct brw_cs_prog_data *cs_prog_data = in iris_compile_cs() local
1980 struct brw_stage_prog_data *prog_data = &cs_prog_data->base; in iris_compile_cs()
2002 brw_compile_cs(compiler, &ice->dbg, mem_ctx, &brw_key, cs_prog_data, in iris_compile_cs()
2068 iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data, in iris_fill_cs_push_const_buffer() argument
2072 assert(brw_cs_push_const_total_size(cs_prog_data, threads) > 0); in iris_fill_cs_push_const_buffer()
2073 assert(cs_prog_data->push.cross_thread.size == 0); in iris_fill_cs_push_const_buffer()
2074 assert(cs_prog_data->push.per_thread.dwords == 1); in iris_fill_cs_push_const_buffer()
2075 assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID); in iris_fill_cs_push_const_buffer()
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| D | iris_state.c | 4508 struct brw_cs_prog_data *cs_prog_data = (void *) shader->prog_data; in iris_store_cs_state() local
4512 desc.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs; in iris_store_cs_state()
4513 desc.BarrierEnable = cs_prog_data->uses_barrier; in iris_store_cs_state()
4515 cs_prog_data->push.cross_thread.regs; in iris_store_cs_state()
6709 struct brw_cs_prog_data *cs_prog_data = (void *) prog_data; in iris_upload_gpgpu_walker() local
6712 brw_cs_simd_size_for_group_size(devinfo, cs_prog_data, group_size); in iris_upload_gpgpu_walker()
6751 ALIGN(cs_prog_data->push.per_thread.regs * threads + in iris_upload_gpgpu_walker()
6752 cs_prog_data->push.cross_thread.regs, 2); in iris_upload_gpgpu_walker()
6758 cs_prog_data->local_size[0] == 0 /* Variable local group size */) { in iris_upload_gpgpu_walker()
6760 assert(cs_prog_data->push.cross_thread.dwords == 0 && in iris_upload_gpgpu_walker()
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| D | iris_context.h | 802 void iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_compiler.h | 1569 brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data,
1574 const struct brw_cs_prog_data *cs_prog_data,
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| D | brw_fs.cpp | 9018 brw_cs_push_const_total_size(const struct brw_cs_prog_data *cs_prog_data, in brw_cs_push_const_total_size() argument
9021 assert(cs_prog_data->push.per_thread.size % REG_SIZE == 0); in brw_cs_push_const_total_size()
9022 assert(cs_prog_data->push.cross_thread.size % REG_SIZE == 0); in brw_cs_push_const_total_size()
9023 return cs_prog_data->push.per_thread.size * threads + in brw_cs_push_const_total_size()
9024 cs_prog_data->push.cross_thread.size; in brw_cs_push_const_total_size()
9037 struct brw_cs_prog_data *cs_prog_data) in cs_fill_push_const_info() argument
9039 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; in cs_fill_push_const_info()
9062 fill_push_const_block_info(&cs_prog_data->push.cross_thread, cross_thread_dwords); in cs_fill_push_const_info()
9063 fill_push_const_block_info(&cs_prog_data->push.per_thread, per_thread_dwords); in cs_fill_push_const_info()
9065 assert(cs_prog_data->push.cross_thread.dwords % 8 == 0 || in cs_fill_push_const_info()
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| D | brw_fs_nir.cpp | 3736 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); in nir_emit_cs_intrinsic() local
3755 cs_prog_data->uses_barrier = true; in nir_emit_cs_intrinsic()
3776 cs_prog_data->binding_table.work_groups_start; in nir_emit_cs_intrinsic()
3778 cs_prog_data->uses_num_work_groups = true; in nir_emit_cs_intrinsic()
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| /external/mesa3d/docs/relnotes/ |
| D | 20.1.0.rst | 1015 - intel/compiler: Replace cs_prog_data->push.total with a helper
1016 - anv: Stop using cs_prog_data->threads
1017 - iris: Stop using cs_prog_data->threads
1018 - intel/compiler: Remove cs_prog_data->threads
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| D | 20.3.0.rst | 3131 - intel/compiler, anv: Delete cs_prog_data->slm_size
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