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/external/chromium-trace/catapult/systrace/systrace/test_data/
Dprofile-chrome_systrace_perf_chrome_data1 …cycles:HG", "weight": 297850, "ts": 196493621870.241, "cpu": 2, "comm": "ksoftirqd/2", "tid": 1410…
/external/tensorflow/tensorflow/python/saved_model/
Dload_test.py69 def cycle(obj, cycles, signatures=None): argument
73 for _ in range(cycles):
87 dict(testcase_name="ReloadOnce", cycles=1),
88 dict(testcase_name="ReloadTwice", cycles=2),
89 dict(testcase_name="ReloadThrice", cycles=3)
93 def test_structure_import(self, cycles): argument
99 imported = cycle(root, cycles)
104 def test_variables(self, cycles): argument
110 for _ in range(cycles):
123 def test_variables_name(self, cycles): argument
[all …]
/external/tensorflow/tensorflow/compiler/xla/service/
Dhuman_readable_profile_builder.cc45 if (op.optimal_seconds == 0 && op.cycles == 0) { in ToString()
51 if (op.cycles > 0 && op.bytes_accessed >= 0) { in ToString()
53 HumanReadableNumBytes(op.bytes_accessed / CyclesToSeconds(op.cycles)), in ToString()
55 double bpc = static_cast<double>(op.bytes_accessed) / op.cycles; in ToString()
56 if (op.bytes_accessed > op.cycles) { in ToString()
66 cumulative_cycles += op.cycles; in ToString()
69 cycles_percent = op.cycles / static_cast<double>(total_cycles_) * 100; in ToString()
84 double nsecs = op.cycles / clock_rate_ghz_; in ToString()
89 op.cycles, cycles_percent_str, CyclesToMicroseconds(op.cycles), in ToString()
115 std::min(double{op.optimal_seconds}, CyclesToSeconds(op.cycles)); in ToString()
[all …]
Dhuman_readable_profile_builder.h49 absl::string_view category, int64 cycles, int64 flop_count, in AddOp() argument
53 cycles, flop_count, transcendental_count, in AddOp()
65 int64 cycles; member
72 double CyclesToSeconds(int64 cycles) const { in CyclesToSeconds() argument
73 return cycles / clock_rate_ghz_ / 1e9; in CyclesToSeconds()
75 double CyclesToMicroseconds(int64 cycles) const { in CyclesToMicroseconds() argument
76 return cycles / clock_rate_ghz_ / 1000.0; in CyclesToMicroseconds()
/external/igt-gpu-tools/tests/i915/
Dgem_sync.c109 unsigned long cycles; in sync_ring() local
123 cycles = 0; in sync_ring()
128 } while (++cycles & 1023); in sync_ring()
133 cycles, elapsed*1e6/cycles); in sync_ring()
148 unsigned long cycles; in idle_ring() local
165 cycles = 0; in idle_ring()
170 } while (++cycles & 1023); in idle_ring()
175 cycles, elapsed*1e6/cycles); in idle_ring()
211 unsigned long cycles; in wakeup_ring() local
237 cycles = 0; in wakeup_ring()
[all …]
/external/llvm-project/lldb/scripts/
Danalyze-project-deps.py85 def is_existing_cycle(path, cycles): argument
94 if any(is_sublist(x, path) for x in cycles):
99 def expand(path_queue, path_lengths, cycles, src_map): argument
106 if is_existing_cycle(cur_path, cycles):
122 if not is_existing_cycle(cycle, cycles):
123 cycles.append(cycle)
130 cycles = [] variable
150 def iter_cycles(cycles): argument
152 for cycle in cycles:
166 expand(path_queue, path_lens, cycles, src_map)
[all …]
/external/tensorflow/tensorflow/python/keras/integration_test/
Dsaved_model_test.py27 def cycle(obj, cycles, signatures=None): argument
31 for _ in range(cycles):
118 dict(testcase_name="ReloadOnce", cycles=1),
119 dict(testcase_name="ReloadTwice", cycles=2),
120 dict(testcase_name="ReloadThrice", cycles=3))
123 def test_optimizer(self, cycles): argument
149 imported = cycle(root, cycles)
159 def test_model_with_custom_function_attached(self, cycles): argument
170 root = cycle(root, cycles)
177 dict(testcase_name="ReloadOnce", cycles=1),
[all …]
/external/rust/crates/itertools/src/
Dpermutations.rs46 cycles: Vec<usize>,
117 PermutationState::Complete(CompleteState::Ongoing { ref indices, ref cycles }) => { in next()
118 let k = cycles.len(); in next()
213 let cycles = ((n - k)..n).rev().collect(); in advance() localVariable
216 cycles, in advance()
220 CompleteState::Ongoing { ref mut indices, ref mut cycles } => { in advance()
222 let k = cycles.len(); in advance()
225 if cycles[i] == 0 { in advance()
226 cycles[i] = n - i - 1; in advance()
231 let swap_index = n - cycles[i]; in advance()
[all …]
/external/antlr/tool/src/main/java/org/antlr/tool/
DLeftRecursionCyclesMessage.java39 public Collection<? extends Collection<? extends Rule>> cycles; field in LeftRecursionCyclesMessage
41 public LeftRecursionCyclesMessage(Collection<? extends Collection<? extends Rule>> cycles) { in LeftRecursionCyclesMessage() argument
43 this.cycles = cycles; in LeftRecursionCyclesMessage()
49 st.add("listOfCycles", cycles); in toString()
/external/llvm/lib/Target/ARM/
DARMScheduleA9.td82 // No operand cycles
203 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
347 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
469 // Extra latency cycles since wbck is 2 cycles
478 // Extra latency cycles since wbck is 2 cycles
488 // Extra latency cycles since wbck is 4 cycles
497 // Extra latency cycles since wbck is 4 cycles
669 // Extra 1 latency cycle since wbck is 2 cycles
678 // Extra 1 latency cycle since wbck is 2 cycles
719 // FIXME: assumes 2 doubles which requires 2 LS cycles.
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMScheduleA9.td81 // No operand cycles
202 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
346 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
468 // Extra latency cycles since wbck is 2 cycles
477 // Extra latency cycles since wbck is 2 cycles
487 // Extra latency cycles since wbck is 4 cycles
496 // Extra latency cycles since wbck is 4 cycles
668 // Extra 1 latency cycle since wbck is 2 cycles
677 // Extra 1 latency cycle since wbck is 2 cycles
718 // FIXME: assumes 2 doubles which requires 2 LS cycles.
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMScheduleA9.td81 // No operand cycles
202 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
346 // FIXME: If address is 64-bit aligned, AGU cycles is 1.
468 // Extra latency cycles since wbck is 2 cycles
477 // Extra latency cycles since wbck is 2 cycles
487 // Extra latency cycles since wbck is 4 cycles
496 // Extra latency cycles since wbck is 4 cycles
668 // Extra 1 latency cycle since wbck is 2 cycles
677 // Extra 1 latency cycle since wbck is 2 cycles
718 // FIXME: assumes 2 doubles which requires 2 LS cycles.
[all …]
/external/autotest/client/cros/
Dstorage.py274 storages = self.wait_for_devices(filter_dict, cycles=1,
292 def wait_for_devices(self, storage_filter, time_to_sleep=1, cycles=10, argument
310 '%d secs' % (storage_filter, cycles, time_to_sleep))
316 if cycles == -1:
321 while cycles == -1 or cycle < cycles:
339 (storage_filter, time_to_sleep*cycles))
343 def wait_for_device(self, storage_filter, time_to_sleep=1, cycles=10, argument
368 cycles=cycles,
/external/llvm-project/llvm/test/CodeGen/X86/
Dearly-ifcvt-remarks.ll6 ; CHECK-SAME: and the short leg adds another {{[0-9]+}} cycles{{s?}},
7 ; CHECK-SAME: and the long leg adds another {{[0-9]+}} cycles{{s?}},
8 ; CHECK-SAME: each staying under the threshold of {{[0-9]+}} cycles{{s?}}.
23 ; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path,
24 ; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}},
25 …ME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} c…
43 ; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}})
45 ; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}},
/external/openscreen/third_party/boringssl/ios-arm/crypto/fipsmodule/
Dsha256-armv4.S35 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
41 @ Cortex A8 core and ~20 cycles per processed byte.
46 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
51 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
52 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/openscreen/third_party/boringssl/linux-arm/crypto/fipsmodule/
Dsha256-armv4.S36 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
42 @ Cortex A8 core and ~20 cycles per processed byte.
47 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
52 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
53 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/boringssl/ios-arm/crypto/fipsmodule/
Dsha256-armv4.S35 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
41 @ Cortex A8 core and ~20 cycles per processed byte.
46 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
51 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
52 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/rust/crates/quiche/deps/boringssl/ios-arm/crypto/fipsmodule/
Dsha256-armv4.S35 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
41 @ Cortex A8 core and ~20 cycles per processed byte.
46 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
51 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
52 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/boringssl/linux-arm/crypto/fipsmodule/
Dsha256-armv4.S36 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
42 @ Cortex A8 core and ~20 cycles per processed byte.
47 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
52 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
53 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/rust/crates/ring/pregenerated/
Dsha256-armv4-ios32.S32 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
38 @ Cortex A8 core and ~20 cycles per processed byte.
43 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
48 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
49 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
Dsha256-armv4-linux32.S33 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
39 @ Cortex A8 core and ~20 cycles per processed byte.
44 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
49 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
50 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/rust/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/
Dsha256-armv4.S36 @ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
42 @ Cortex A8 core and ~20 cycles per processed byte.
47 @ improvement on Cortex A8 core and ~15.4 cycles per processed byte.
52 @ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon
53 @ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only
/external/perfetto/test/trace_processor/parsing/
Dthread_time_in_state_event.out3 "counter","Total big core cycles / sec",2000000000,1000000000,0,1000
4 "counter","Total little core cycles / sec",2000000000,1000000000,0,100
7 "counter","Total big core cycles / sec",3000000000,1000000000,0,30000
8 "counter","Total little core cycles / sec",3000000000,1000000000,0,3100
/external/llvm-project/llvm/test/Transforms/EarlyCSE/AMDGPU/
Dmemrealtime.ll7 define amdgpu_kernel void @memrealtime(i64 %cycles) #0 {
10 %cmp3 = icmp sgt i64 %cycles, 0
16 %cmp = icmp slt i64 %sub, %cycles
26 define amdgpu_kernel void @memtime(i64 %cycles) #0 {
29 %cmp3 = icmp sgt i64 %cycles, 0
35 %cmp = icmp slt i64 %sub, %cycles
/external/autotest/client/tests/signaltest/src/
Dsignaltest.c54 unsigned long cycles; member
154 if (!par->id && !(stat->cycles & 0x0F)) in signalthread()
185 stat->cycles++; in signalthread()
188 stat->values[stat->cycles & par->bufmsk] = diff; in signalthread()
190 if (par->max_cycles && par->max_cycles == stat->cycles) in signalthread()
300 stat->cycles, stat->min, stat->act, in print_stat()
301 stat->cycles ? in print_stat()
302 (long)(stat->avg/stat->cycles) : 0, stat->max); in print_stat()
305 while (stat->cycles != stat->cyclesread) { in print_stat()
398 if(max_cycles && stat[0].cycles >= max_cycles) in main()

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