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Searched refs:db_stencil_base (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c2413 surf->db_stencil_base = (tex->buffer.gpu_address + tex->surface.u.gfx9.stencil_offset) >> 8; in si_init_depth_surface()
2457 surf->db_stencil_base = in si_init_depth_surface()
3147 radeon_emit(cs, zb->db_stencil_base); /* DB_STENCIL_READ_BASE */ in si_emit_framebuffer_state()
3149 radeon_emit(cs, zb->db_stencil_base); /* DB_STENCIL_WRITE_BASE */ in si_emit_framebuffer_state()
3153 radeon_emit(cs, zb->db_stencil_base >> 32); /* DB_STENCIL_READ_BASE_HI */ in si_emit_framebuffer_state()
3155 radeon_emit(cs, zb->db_stencil_base >> 32); /* DB_STENCIL_WRITE_BASE_HI */ in si_emit_framebuffer_state()
3170 radeon_emit(cs, zb->db_stencil_base); /* DB_STENCIL_READ_BASE */ in si_emit_framebuffer_state()
3171 radeon_emit(cs, S_02804C_BASE_HI(zb->db_stencil_base >> 32)); /* DB_STENCIL_READ_BASE_HI */ in si_emit_framebuffer_state()
3174 radeon_emit(cs, zb->db_stencil_base); /* DB_STENCIL_WRITE_BASE */ in si_emit_framebuffer_state()
3176 S_02805C_BASE_HI(zb->db_stencil_base >> 32)); /* DB_STENCIL_WRITE_BASE_HI */ in si_emit_framebuffer_state()
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Dsi_pipe.h421 uint64_t db_stencil_base; member
/external/mesa3d/src/gallium/drivers/r600/
Dr600_pipe_common.h273 uint64_t db_stencil_base; /* EG and later */ member
Devergreen_state.c1417 surf->db_stencil_base = stencil_offset >> 8; in evergreen_init_depth_surface()
1421 surf->db_stencil_base = offset; in evergreen_init_depth_surface()
1934 radeon_emit(cs, zb->db_stencil_base); /* R_02804C_DB_STENCIL_READ_BASE */ in evergreen_emit_framebuffer_state()
1936 radeon_emit(cs, zb->db_stencil_base); /* R_028054_DB_STENCIL_WRITE_BASE */ in evergreen_emit_framebuffer_state()