Searched refs:ddr_data (Results 1 – 3 of 3) sorted by relevance
| /external/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/ |
| D | pmu.c | 102 static struct px30_sleep_ddr_data ddr_data variable
184 SAVE_QOS(ddr_data.cpu_qos, CPU); in qos_save()
187 SAVE_QOS(ddr_data.gpu_qos, GPU); in qos_save()
189 SAVE_QOS(ddr_data.isp_128m_qos, ISP_128M); in qos_save()
190 SAVE_QOS(ddr_data.isp_rd_qos, ISP_RD); in qos_save()
191 SAVE_QOS(ddr_data.isp_wr_qos, ISP_WR); in qos_save()
192 SAVE_QOS(ddr_data.isp_m1_qos, ISP_M1); in qos_save()
193 SAVE_QOS(ddr_data.vip_qos, VIP); in qos_save()
196 SAVE_QOS(ddr_data.rga_rd_qos, RGA_RD); in qos_save()
197 SAVE_QOS(ddr_data.rga_wr_qos, RGA_WR); in qos_save()
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| /external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
| D | pmu.c | 28 static struct rk3328_sleep_ddr_data ddr_data; variable
254 ddr_data.clk_ungt_save[i] = in clks_gating_suspend()
267 ddr_data.clk_ungt_save[i] | 0xffff0000); in clks_gating_resume()
349 ddr_data.cru_plls_con_save[pll_id][i] = in pll_suspend()
359 ddr_data.cru_plls_con_save[pll_id][1] | 0xc0000000); in pll_resume()
363 if (PLL_IS_NORM_MODE(ddr_data.cru_mode_save, pll_id)) in pll_resume()
370 ddr_data.cru_mode_save = mmio_read_32(CRU_BASE + CRU_CRU_MODE); in pm_plls_suspend()
371 ddr_data.clk_sel0 = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(0)); in pm_plls_suspend()
372 ddr_data.clk_sel1 = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(1)); in pm_plls_suspend()
373 ddr_data.clk_sel18 = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(18)); in pm_plls_suspend()
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| /external/arm-trusted-firmware/plat/rockchip/common/pmusram/ |
| D | cpus_on_fixed_addr.h | 34 uint64_t ddr_data; member
44 CASSERT(__builtin_offsetof(struct psram_data_t, ddr_data) == PSRAM_DT_DDR_DATA,
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