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Searched refs:disp8 (Results 1 – 8 of 8) sorted by relevance

/external/llvm-project/llvm/test/MC/X86/
Dx86-64.s1920 {disp8} movl $1, (%rax)
1933 {disp8} movl $1, (%rbp)
1944 {disp8} movl $1, (%r13)
1955 {disp8} movl $1, 8(%rax)
1966 {disp8} movl $1, (%rax,%rbx,4)
1977 {disp8} movl $1, 8(%rax,%rbx,4)
1988 {disp8} movl $1, (%rbp,%rbx,4)
1999 {disp8} movl $1, (%r13,%rbx,4)
/external/elfutils/libcpu/defs/
Di38626 %mask {disp8} 8
376 0111{tttn},{disp8}:j{tttn} {disp8}
379 # SPECIAL 11100011,{disp8}:[{dpfx}?jcxz:jecxz] {disp8}
380 11100011,{disp8}:INVALID {disp8}
381 11101011,{disp8}:jmp {disp8}
409 11100010,{disp8}:loop {disp8}
410 11100001,{disp8}:loope {disp8}
411 11100000,{disp8}:loopne {disp8}
/external/llvm-project/llvm/docs/
DReleaseNotes.rst121 * The assembler now has support for {disp32} and {disp8} pseudo prefixes for
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX8632Traits.h113 int8_t disp8() const { in disp8() function
DIceTargetLoweringX8664Traits.h126 int8_t disp8() const { in disp8() function
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrFormats.td323 bits<3> CD8_Form = 0; // Compressed disp8 form - vector-width.
326 int CD8_EltSize = 0; // Compressed disp8 form - element-size in bytes.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFormats.td312 bits<3> CD8_Form = 0; // Compressed disp8 form - vector-width.
315 int CD8_EltSize = 0; // Compressed disp8 form - element-size in bytes.
/external/llvm/lib/Target/X86/
DX86InstrFormats.td278 bits<3> CD8_Form = 0; // Compressed disp8 form - vector-width.
281 int CD8_EltSize = 0; // Compressed disp8 form - element-size in bytes.