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/external/skia/tests/sksl/errors/
DUnknownDivideByZero.glsl3 error: 5: division by zero
4 error: 6: division by zero
5 error: 7: division by zero
6 error: 8: division by zero
7 error: 9: division by zero
8 error: 10: division by zero
9 error: 11: division by zero
10 error: 13: division by zero
11 error: 14: division by zero
12 error: 15: division by zero
[all …]
DDivideByZero.glsl3 error: 1: division by zero
4 error: 2: division by zero
5 error: 3: division by zero
6 error: 4: division by zero
/external/icu/android_icu4j/src/main/java/android/icu/impl/coll/
DBOCSU.java295 long division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff() local
296 int modulo = (int)division; in writeDiff()
298 diff = (int)(division >> 32); in writeDiff()
304 diff = (int)(division >> 32); in writeDiff()
305 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
306 modulo = (int)division; in writeDiff()
307 diff = (int)(division >> 32); in writeDiff()
314 diff = (int)(division >> 32); in writeDiff()
315 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
316 modulo = (int)division; in writeDiff()
[all …]
/external/icu/icu4j/main/classes/collate/src/com/ibm/icu/impl/coll/
DBOCSU.java294 long division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff() local
295 int modulo = (int)division; in writeDiff()
297 diff = (int)(division >> 32); in writeDiff()
303 diff = (int)(division >> 32); in writeDiff()
304 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
305 modulo = (int)division; in writeDiff()
306 diff = (int)(division >> 32); in writeDiff()
313 diff = (int)(division >> 32); in writeDiff()
314 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
315 modulo = (int)division; in writeDiff()
[all …]
/external/llvm-project/llvm/test/CodeGen/AVR/
Ddiv.ll3 ; Unsigned 8-bit division
13 ; Signed 8-bit division
23 ; Unsigned 16-bit division
33 ; Signed 16-bit division
43 ; Unsigned 32-bit division
54 ; Signed 32-bit division
65 ; Unsigned 64-bit division
74 ; Signed 64-bit division
83 ; Unsigned 128-bit division
92 ; Signed 128-bit division
/external/llvm-project/clang-tools-extra/docs/clang-tidy/checks/
Dabseil-duration-division.rst1 .. title:: clang-tidy - abseil-duration-division
3 abseil-duration-division
7 division of two ``absl::Duration`` objects returns an ``int64`` with any fractional
16 int64 sec2 = absl::ToInt64Seconds(d); // Equivalent to division.
22 If you want floating-point division, you should use either the
34 This check looks for uses of ``absl::Duration`` division that is done in a
Dbugprone-integer-division.rst1 .. title:: clang-tidy - bugprone-integer-division
3 bugprone-integer-division
6 Finds cases where integer division in a floating point context is likely to
31 // OK, no integer division.
Dabseil-duration-unnecessary-conversion.rst23 // Suggestion - Remove division and conversion
37 // Original - Integer division followed by conversion
40 // Suggestion - Remove division and conversion
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dvec-div-01.ll1 ; Test vector division. There is no native integer support for this,
6 ; Test a v16i8 division.
29 ; Test a v8i16 division.
44 ; Test a v4i32 division.
55 ; Test a v2i64 division.
64 ; Test a v2f64 division.
74 ; Test an f64 division that uses vector registers.
Dint-div-06.ll5 ; Check signed 32-bit division.
18 ; Check unsigned 32-bit division.
29 ; Check signed 64-bit division.
46 ; Check unsigned 64-bit division.
Dvec-div-02.ll1 ; Test vector division on z14.
5 ; Test a v4f32 division.
15 ; Test an f32 division that uses vector registers.
Dvec-strict-div-02.ll1 ; Test strict vector division on z14.
8 ; Test a v4f32 division.
21 ; Test an f32 division that uses vector registers.
Dvec-strict-div-01.ll1 ; Test strict vector division.
8 ; Test a v2f64 division.
21 ; Test an f64 division that uses vector registers.
Dint-div-03.ll1 ; Test 64-bit signed division and remainder when the divisor is
8 ; Test register division. The result is in the second of the two registers.
34 ; Test that division and remainder use a single instruction.
48 ; Test register division when the dividend is zero rather than sign extended.
71 ; Test memory division with no displacement.
99 ; Test both memory division and memory remainder.
194 ; a load and division cannot be combined.
/external/llvm/test/CodeGen/SystemZ/
Dvec-div-01.ll1 ; Test vector division. There is no native integer support for this,
6 ; Test a v16i8 division.
29 ; Test a v8i16 division.
44 ; Test a v4i32 division.
55 ; Test a v2i64 division.
64 ; Test a v2f64 division.
74 ; Test an f64 division that uses vector registers.
Dint-div-06.ll5 ; Check signed 32-bit division.
18 ; Check unsigned 32-bit division.
29 ; Check signed 64-bit division.
46 ; Check unsigned 64-bit division.
Dint-div-03.ll1 ; Test 64-bit signed division and remainder when the divisor is
8 ; Test register division. The result is in the second of the two registers.
34 ; Test that division and remainder use a single instruction.
48 ; Test register division when the dividend is zero rather than sign extended.
71 ; Test memory division with no displacement.
99 ; Test both memory division and memory remainder.
194 ; a load and division cannot be combined.
/external/FXdiv/
DMETADATA2 …division via fixed-point multiplication by inverse On modern CPUs and GPUs integer division is se…
DREADME.md7 Header-only library for division via fixed-point multiplication by inverse
9 …s and GPUs integer division is several times slower than multiplication. FXdiv implements an algor…
13 - Integer division for `uint32_t`, `uint64_t`, and `size_t`
/external/tensorflow/tensorflow/
D__init__.py20 from __future__ import division
31 del division
/external/tensorflow/tensorflow/python/keras/preprocessing/
D__init__.py18 from __future__ import division
36 del division
/external/tensorflow/tensorflow/python/saved_model/
Dsignature_def_utils.py20 from __future__ import division
36 del division
/external/tensorflow/tensorflow/python/ops/
Dinitializers_ns.py18 from __future__ import division
43 del division
/external/llvm-project/llvm/test/Transforms/LoopVectorize/
Dpr38697.ll27 ; No explicit division appears in the input, but a division is generated during
28 ; vectorization, and that division is a division-by-0 when the input 'count'
114 ; division from the inner loop to the preheader.
175 ; and so it is illegal to hoist the division because if 'start1' is 0, hoisting
234 ; This version is has a clearly safe division by a non-zero constant (16). The
235 ; division is transformed to a logical-shift-right of 4, and it is safely
238 ; Verify that the division-operation is hoisted, and that it appears as a
239 ; right-shift ('lshr') rather than an explicit division.
296 ; This version is has a clearly safe division by a non-zero constant (17). The
297 ; division is safely hoisted, as it was in the 'DivBy16Hoist' verison, but here
[all …]
/external/bc/manuals/
Dalgorithms.md35 This `bc` uses Algorithm D ([long division][2]). Long division is polynomial
36 (`O(n^2)`), but unlike Karatsuba, any division "divide and conquer" algorithm
38 algorithms become less attractive with division as this operation typically
41 While the implementation of long division may appear to use the subtractive
52 Using multiplication would make division have the even worse algorithmic
65 operation. Its complexity is `O(log(n)*n^2)` as it requires one division per

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