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Searched refs:dl (Results 1 – 25 of 1324) sorted by relevance

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/external/iproute2/devlink/
Ddevlink.c203 struct dl { struct
222 static int dl_argc(struct dl *dl) in dl_argc() argument
224 return dl->argc; in dl_argc()
227 static char *dl_argv(struct dl *dl) in dl_argv() argument
229 if (dl_argc(dl) == 0) in dl_argv()
231 return *dl->argv; in dl_argv()
234 static void dl_arg_inc(struct dl *dl) in dl_arg_inc() argument
236 if (dl_argc(dl) == 0) in dl_arg_inc()
238 dl->argc--; in dl_arg_inc()
239 dl->argv++; in dl_arg_inc()
[all …]
/external/llvm-project/clang/test/Sema/
Dtautological-unsigned-zero-compare.c237 double dl = 0; in main() local
239 if (dl == 0) in main()
241 if (dl != 0) in main()
243 if (dl < 0) in main()
245 if (dl <= 0) in main()
247 if (dl > 0) in main()
249 if (dl >= 0) in main()
252 if (0 == dl) in main()
254 if (0 != dl) in main()
256 if (0 < dl) in main()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp209 const SDLoc &dl, SelectionDAG &DAG) const { in getInt() argument
211 IntOps.push_back(DAG.getConstant(IntId, dl, MVT::i32)); in getInt()
214 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
259 HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, in opJoin() argument
261 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
266 HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, in opSplit() argument
271 return DAG.SplitVector(Vec, dl, Tys.first, Tys.second); in opSplit()
297 const SDLoc &dl(ElemIdx); in convertToByteIndex() local
298 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
299 {ElemIdx, DAG.getConstant(L, dl, MVT::i32)}); in convertToByteIndex()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp97 const SDLoc &dl);
99 const SDLoc &dl);
105 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, const SDLoc &dl,
110 bool &NeedInvert, const SDLoc &dl);
114 unsigned NumOps, bool isSigned, const SDLoc &dl);
132 const SDLoc &dl);
144 const SDLoc &dl);
146 const SDLoc &dl);
148 const SDLoc &dl);
150 SDValue ExpandBITREVERSE(SDValue Op, const SDLoc &dl);
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DLegalizeTypesGeneric.cpp46 SDLoc dl(N); in ExpandRes_BITCAST() local
63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
75 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
76 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
90 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
97 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); in ExpandRes_BITCAST()
[all …]
DLegalizeIntegerTypes.cpp255 SDLoc dl(N); in PromoteIntRes_BITCAST() local
263 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
267 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
271 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, PromotedOp); in PromoteIntRes_BITCAST()
280 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
294 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
298 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
305 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
308 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
316 SDLoc dl(N); in PromoteIntRes_BSWAP() local
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DTargetLowering.cpp119 const SDLoc &dl, bool doesNotReturn, in makeLibCall() argument
141 CLI.setDebugLoc(dl).setChain(DAG.getEntryNode()) in makeLibCall()
153 const SDLoc &dl) const { in softenSetCCOperands()
256 dl).first; in softenSetCCOperands()
257 NewRHS = DAG.getConstant(0, dl, RetVT); in softenSetCCOperands()
265 ISD::SETCC, dl, in softenSetCCOperands()
269 dl).first; in softenSetCCOperands()
271 ISD::SETCC, dl, in softenSetCCOperands()
274 NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS); in softenSetCCOperands()
342 SDLoc dl(Op); in ShrinkDemandedConstant() local
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/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp302 const SDLoc &dl, SelectionDAG &DAG) const { in getInt() argument
304 IntOps.push_back(DAG.getConstant(IntId, dl, MVT::i32)); in getInt()
307 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
352 HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, in opJoin() argument
354 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
359 HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, in opSplit() argument
364 return DAG.SplitVector(Vec, dl, Tys.first, Tys.second); in opSplit()
421 const SDLoc &dl(ElemIdx); in convertToByteIndex() local
422 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
423 {ElemIdx, DAG.getConstant(L, dl, MVT::i32)}); in convertToByteIndex()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp293 SDLoc dl(N); in PromoteIntRes_BITCAST() local
301 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
305 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
309 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp)); in PromoteIntRes_BITCAST()
318 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
333 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
337 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
347 DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
355 Res = DAG.getNode(ISD::SRL, dl, NOutVT, Res, in PromoteIntRes_BITCAST()
356 DAG.getConstant(ShiftAmt, dl, ShiftAmtTy)); in PromoteIntRes_BITCAST()
[all …]
DLegalizeTypesGeneric.cpp45 SDLoc dl(N); in ExpandRes_BITCAST() local
57 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
58 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
76 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
77 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
82 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
83 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
90 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); in ExpandRes_BITCAST()
[all …]
DLegalizeDAG.cpp124 const SDLoc &dl);
126 const SDLoc &dl);
132 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, const SDLoc &dl,
137 bool &NeedInvert, const SDLoc &dl, SDValue &Chain,
162 const SDLoc &dl);
164 const SDLoc &dl, SDValue ChainIn);
177 void PromoteLegalINT_TO_FP(SDNode *N, const SDLoc &dl,
179 void PromoteLegalFP_TO_INT(SDNode *N, const SDLoc &dl,
182 SDValue ExpandBITREVERSE(SDValue Op, const SDLoc &dl);
183 SDValue ExpandBSWAP(SDValue Op, const SDLoc &dl);
[all …]
DTargetLowering.cpp129 const SDLoc &dl, in makeLibCall() argument
168 CLI.setDebugLoc(dl) in makeLibCall()
286 const SDLoc &dl, const SDValue OldLHS, in softenSetCCOperands() argument
289 return softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, dl, OldLHS, in softenSetCCOperands()
296 const SDLoc &dl, const SDValue OldLHS, in softenSetCCOperands() argument
402 auto Call = makeLibCall(DAG, LC1, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands()
404 NewRHS = DAG.getConstant(0, dl, RetVT); in softenSetCCOperands()
418 SDValue Tmp = DAG.getSetCC(dl, SetCCVT, NewLHS, NewRHS, CCCode); in softenSetCCOperands()
419 auto Call2 = makeLibCall(DAG, LC2, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands()
423 NewLHS = DAG.getSetCC(dl, SetCCVT, Call2.first, NewRHS, CCCode); in softenSetCCOperands()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp167 inline SDValue getI16Imm(unsigned Imm, const SDLoc &dl) { in getI16Imm() argument
168 return CurDAG->getTargetConstant(Imm, dl, MVT::i16); in getI16Imm()
173 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm() argument
174 return CurDAG->getTargetConstant(Imm, dl, MVT::i32); in getI32Imm()
179 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm() argument
180 return CurDAG->getTargetConstant(Imm, dl, MVT::i64); in getI64Imm()
184 inline SDValue getSmallIPtrImm(unsigned Imm, const SDLoc &dl) { in getSmallIPtrImm() argument
186 Imm, dl, PPCLowering->getPointerTy(CurDAG->getDataLayout())); in getSmallIPtrImm()
219 const SDLoc &dl, SDValue Chain = SDValue());
335 SDLoc dl(Op); in SelectInlineAsmMemoryOperand() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp167 inline SDValue getI16Imm(unsigned Imm, const SDLoc &dl) { in getI16Imm() argument
168 return CurDAG->getTargetConstant(Imm, dl, MVT::i16); in getI16Imm()
173 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm() argument
174 return CurDAG->getTargetConstant(Imm, dl, MVT::i32); in getI32Imm()
179 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm() argument
180 return CurDAG->getTargetConstant(Imm, dl, MVT::i64); in getI64Imm()
184 inline SDValue getSmallIPtrImm(unsigned Imm, const SDLoc &dl) { in getSmallIPtrImm() argument
186 Imm, dl, PPCLowering->getPointerTy(CurDAG->getDataLayout())); in getSmallIPtrImm()
220 const SDLoc &dl);
322 SDLoc dl(Op); in SelectInlineAsmMemoryOperand() local
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp124 const SDLoc &dl);
126 const SDLoc &dl);
132 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, const SDLoc &dl,
137 bool &NeedInvert, const SDLoc &dl, SDValue &Chain,
162 const SDLoc &dl);
164 const SDLoc &dl, SDValue ChainIn);
178 void PromoteLegalINT_TO_FP(SDNode *N, const SDLoc &dl,
180 void PromoteLegalFP_TO_INT(SDNode *N, const SDLoc &dl,
183 SDValue ExpandBITREVERSE(SDValue Op, const SDLoc &dl);
184 SDValue ExpandBSWAP(SDValue Op, const SDLoc &dl);
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DLegalizeIntegerTypes.cpp332 SDLoc dl(N); in PromoteIntRes_BITCAST() local
340 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); in PromoteIntRes_BITCAST()
344 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST()
347 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp)); in PromoteIntRes_BITCAST()
351 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp)); in PromoteIntRes_BITCAST()
360 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST()
377 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST()
381 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); in PromoteIntRes_BITCAST()
391 DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
399 Res = DAG.getNode(ISD::SRL, dl, NOutVT, Res, in PromoteIntRes_BITCAST()
[all …]
DLegalizeTypesGeneric.cpp45 SDLoc dl(N); in ExpandRes_BITCAST() local
58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
93 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); in ExpandRes_BITCAST()
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DTargetLowering.cpp133 const SDLoc &dl, in makeLibCall() argument
172 CLI.setDebugLoc(dl) in makeLibCall()
278 const SDLoc &dl, const SDValue OldLHS, in softenSetCCOperands() argument
281 return softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, dl, OldLHS, in softenSetCCOperands()
288 const SDLoc &dl, const SDValue OldLHS, in softenSetCCOperands() argument
394 auto Call = makeLibCall(DAG, LC1, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands()
396 NewRHS = DAG.getConstant(0, dl, RetVT); in softenSetCCOperands()
410 SDValue Tmp = DAG.getSetCC(dl, SetCCVT, NewLHS, NewRHS, CCCode); in softenSetCCOperands()
411 auto Call2 = makeLibCall(DAG, LC2, RetVT, Ops, CallOptions, dl, Chain); in softenSetCCOperands()
415 NewLHS = DAG.getSetCC(dl, SetCCVT, Call2.first, NewRHS, CCCode); in softenSetCCOperands()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp47 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset() argument
88 CLI.setDebugLoc(dl) in EmitTargetCodeForMemset()
134 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
140 Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl); in EmitTargetCodeForMemset()
144 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
149 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
150 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Val, InFlag); in EmitTargetCodeForMemset()
155 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
158 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RDI : X86::EDI, in EmitTargetCodeForMemset()
164 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops); in EmitTargetCodeForMemset()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp52 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val, in EmitTargetCodeForMemset() argument
93 CLI.setDebugLoc(dl) in EmitTargetCodeForMemset()
139 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
144 Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl); in EmitTargetCodeForMemset()
148 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
153 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
154 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Val, InFlag); in EmitTargetCodeForMemset()
159 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
162 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RDI : X86::EDI, in EmitTargetCodeForMemset()
168 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops); in EmitTargetCodeForMemset()
[all …]
/external/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp48 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemset() argument
88 CLI.setDebugLoc(dl).setChain(Chain) in EmitTargetCodeForMemset()
133 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
139 Count = DAG.getIntPtrConstant(SizeVal / UBytes, dl); in EmitTargetCodeForMemset()
143 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
148 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
149 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag); in EmitTargetCodeForMemset()
153 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
156 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI, in EmitTargetCodeForMemset()
162 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops); in EmitTargetCodeForMemset()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp94 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm() argument
95 return CurDAG->getTargetConstant(Imm, dl, MVT::i32); in getI32Imm()
100 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm() argument
101 return CurDAG->getTargetConstant(Imm, dl, MVT::i64); in getI64Imm()
105 inline SDValue getSmallIPtrImm(unsigned Imm, const SDLoc &dl) { in getSmallIPtrImm() argument
107 Imm, dl, PPCLowering->getPointerTy(CurDAG->getDataLayout())); in getSmallIPtrImm()
131 const SDLoc &dl);
203 SDLoc dl(Op); in SelectInlineAsmMemoryOperand() local
204 SDValue RC = CurDAG->getTargetConstant(TRC->getID(), dl, MVT::i32); in SelectInlineAsmMemoryOperand()
207 dl, Op.getValueType(), in SelectInlineAsmMemoryOperand()
[all …]
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp255 SDLoc dl(GA); in getGlobalAddressWrapper() local
258 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
263 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
265 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
330 SDLoc dl(CP); in LowerConstantPool() local
340 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
353 SDLoc dl(Op); in LowerBR_JT() local
362 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
365 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
366 DAG.getConstant(1, dl, MVT::i32)); in LowerBR_JT()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp252 SDLoc dl(GA); in getGlobalAddressWrapper() local
255 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
260 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
262 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
326 SDLoc dl(CP); in LowerConstantPool() local
336 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
349 SDLoc dl(Op); in LowerBR_JT() local
358 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
361 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
362 DAG.getConstant(1, dl, MVT::i32)); in LowerBR_JT()
[all …]
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp252 SDLoc dl(GA); in getGlobalAddressWrapper() local
255 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
260 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
262 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); in getGlobalAddressWrapper()
326 SDLoc dl(CP); in LowerConstantPool() local
336 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); in LowerConstantPool()
349 SDLoc dl(Op); in LowerBR_JT() local
358 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); in LowerBR_JT()
361 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
362 DAG.getConstant(1, dl, MVT::i32)); in LowerBR_JT()
[all …]

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