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Searched refs:dpb_size (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/gallium/drivers/r600/
Dradeon_uvd.c238 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
292 dpb_size = image_size * max_references; in calc_dpb_size()
294 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); in calc_dpb_size()
295 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); in calc_dpb_size()
301 dpb_size = image_size * max_references; in calc_dpb_size()
304 dpb_size += width_in_mb * height_in_mb * max_references * 192; in calc_dpb_size()
306 dpb_size += width_in_mb * height_in_mb * 32; in calc_dpb_size()
317 dpb_size = image_size * max_references; in calc_dpb_size()
320 dpb_size += width_in_mb * height_in_mb * 128; in calc_dpb_size()
323 dpb_size += width_in_mb * 64; in calc_dpb_size()
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Dradeon_uvd.h359 uint32_t dpb_size; member
371 uint32_t dpb_size; member
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_uvd.c336 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
390 dpb_size = image_size * max_references; in calc_dpb_size()
393 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); in calc_dpb_size()
394 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); in calc_dpb_size()
400 dpb_size = image_size * max_references; in calc_dpb_size()
404 dpb_size += width_in_mb * height_in_mb * max_references * 192; in calc_dpb_size()
406 dpb_size += width_in_mb * height_in_mb * 32; in calc_dpb_size()
421 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * in calc_dpb_size()
424 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * in calc_dpb_size()
433 dpb_size = image_size * max_references; in calc_dpb_size()
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Dradeon_vcn_dec.c913 unsigned dpb_size = calc_dpb_size(dec); in rvcn_dec_message_decode() local
915 if (dpb_size) { in rvcn_dec_message_decode()
917 r = si_vid_create_tmz_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT); in rvcn_dec_message_decode()
919 r = si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT); in rvcn_dec_message_decode()
1012 decode->dpb_size = dec->dpb.res->buf->size; in rvcn_dec_message_decode()
1289 unsigned width_in_mb, height_in_mb, image_size, dpb_size; in calc_dpb_size() local
1340 dpb_size = image_size * max_references; in calc_dpb_size()
1353 dpb_size = align((align(width, 32) * height * 9) / 4, 256) * max_references; in calc_dpb_size()
1355 dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references; in calc_dpb_size()
1363 dpb_size = image_size * max_references; in calc_dpb_size()
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Dradeon_uvd.h359 uint32_t dpb_size; member
371 uint32_t dpb_size; member
Dradeon_vcn_dec.h328 unsigned int dpb_size; member
/external/libdrm/tests/amdgpu/
Dcs_tests.c276 const unsigned dpb_size = 15923584, dt_size = 737280; in amdgpu_cs_uvd_decode() local
291 req.alloc_size += ALIGN(dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
347 memset(ptr, 0, dpb_size); in amdgpu_cs_uvd_decode()
349 ptr += ALIGN(dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
374 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); in amdgpu_cs_uvd_decode()
Dvcn_tests.c353 const unsigned dpb_size = 15923584, dt_size = 737280; in amdgpu_cs_vcn_dec_decode() local
363 size += ALIGN(dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
390 dec += ALIGN(dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
398 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024); in amdgpu_cs_vcn_dec_decode()
/external/mesa3d/docs/relnotes/
D20.3.0.rst4442 - radeon/vcn : Corrected dpb_size calculation for VP9_2